IP Library Granted Patent US 10,216,242
Granted Patent B2
US 10,216,242 · App. 15/610,612 · Granted Feb 26, 2019

Power sequencing for embedded flash memory devices

Inventors: Hieu Van Tran (San Jose, CA); Thuan Vu (San Jose, CA); Anh Ly (San Jose, CA); Hung Quoc Nguyen (Fremont, CA)
Assignee: SILICON STORAGE TECHNOLOGY, INC.
G06F1/266G06F1/28G11C5/14G11C5/143G11C5/147G11C5/148G11C7/20G11C16/30H03K19/018521G11C11/4074
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,216,242
App. No.
15/610,612
Granted
Feb 26, 2019
Kind
B2
Abstract

A system and method for improved power sequencing within an embedded flash memory device is disclosed. Various power-on sequences and power-down sequences for a plurality of voltage sources are utilized to improve the performance of an embedded flash memory device. The plurality of voltage sources can be used for different purposes within the embedded flash memory device.

Claims (46)

1. A power management unit comprising a first voltage source and a second voltage source configured to perform a power-on sequence, wherein:

during a first time period, the voltage output from the first voltage source ramps upward and the voltage output from the second voltage sour ramps upward;

during a second time period immediately following the first time period, the voltage output from the first voltage source ramps upward and the voltage output from the second voltage remains at a constant level;

during a third time period immediately following the second time period, the voltage output from the first voltage source ramps upward and the voltage output from the second voltage sour ramps upward; and

during a fourth time period immediately following the third time period, the voltage output from the first voltage source ramps upward and the voltage output from the second voltage source remains at a constant level.

2. The power management unit of claim 1 , wherein the first voltage source and the second voltage source are configured to perform a power-down sequence, wherein:

during a fifth time period, the voltage output from the first voltage source ramps downward and the voltage output from the second voltage remains at a constant level;

during a sixth time period immediately following the fifth time period, the voltage output from the first voltage source ramps downward and the voltage output from the second voltage ramps downward and then remains at a constant level; and

during a seventh time period immediately following the sixth time period, the voltage output from the first voltage source ramps downward and the voltage output from the second voltage source ramps downward.

3. The power management unit of claim 2 , wherein the first voltage source, the second voltage source, and the second voltage source are configured to perform a power-down sequence, wherein:

during a sixth time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage remains at a constant level, and the voltage output from the third voltage source ramps downward;

during a seventh time period immediately following the sixth time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage source ramps downward, and the voltage output from the third voltage ramps downward.

4. A power management unit comprising a first voltage source, a second voltage source, and a third voltage source configured to perform a power-on sequence, wherein:

during a first time period, the voltage output from the first voltage source ramps upward, the voltage output from the second voltage sour remains at a constant level, and the voltage output from the third voltage ramps upward;

during a second time period immediately following the first time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, and the third voltage source remains at a constant level;

during a third time period immediately following the second time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage source ramps upward, and the voltage output from the third voltage sour remains at a constant level.

5. The power management unit of claim 4 , wherein the first voltage source, the second voltage source, and the second voltage source are configured to perform a power-down sequence, wherein:

during a fourth time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage remains at a constant level, and the voltage output from the third voltage source ramps downward;

during a fifth time period immediately following the fourth time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage source ramps downward, and the voltage output from the third voltage ramps downward.

6. A power management unit comprising a first voltage source, a second voltage source, a third voltage source, and a fourth voltage source configured to perform a power-on sequence, wherein:

during a first time period, the voltage output from the first voltage source ramps upward, the voltage output from the second voltage sour remains at a constant level, the voltage output from the third voltage remains at a constant level, and the voltage output from a fourth voltage remains at a constant level;

during a second time period immediately following the first time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, the voltage output from the third voltage source remains at a constant level, and the voltage output from the fourth voltage source remains at a constant level;

during a third time period immediately following the second time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage ramps upward and then remains at a constant level, the voltage output from the third voltage source remains at a constant level, and the voltage output from the fourth voltage source remains at a constant level; and

during a fourth time period immediately following the third time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, the voltage output from the third voltage source ramps upward, and the voltage output from the fourth voltage source ramps upward.

7. The power management unit of claim 6 , wherein the first voltage source, the second voltage source, the third voltage source, and the fourth voltage source are configured to perform a power-down sequence, wherein:

during a fifth time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, the voltage output from the third voltage source ramps downward, and the voltage output from the fourth voltage source remains constant and then ramps downward;

during a sixth time period immediately following the fifth time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, the voltage output from the third voltage source remains at a constant level, and the voltage output from the fourth voltage source remains at a constant level;

during a seventh time period immediately following the sixth time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage remains at a constant level, the voltage output from the third voltage source remains at a constant level, and the voltage output from the fourth voltage source remains at a constant level; and

during an eighth time period immediately following the seventh time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage ramps downward, the voltage output from the third voltage source remains at a constant level, and the voltage output from the fourth voltage source remains at a constant level.

8. A power management unit comprising a first voltage source, a second voltage source, and a third voltage source configured to perform a power-on sequence, wherein:

during a first time period, the voltage output from the first voltage source ramps upward, the voltage output from the second voltage source remains at a constant level, and the voltage output from the third voltage ramps remains at a constant level;

during a second time period immediately following the first time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, and the third voltage source remains at a constant level;

during a third time period immediately following the second time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage source ramps upward and then remains at a constant level, and the voltage output from the third voltage source ramps upward and then remains at a constant level; and

during a fourth time period immediately following the fifth time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage source ramps upward and then remains at a constant level, and the voltage output from the third voltage source ramps upward.

9. The power management unit of claim 8 , wherein the first voltage source, the second voltage source, and the second voltage source are configured to perform a power-down sequence, wherein:

during a fifth time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage remains at a constant level, and the voltage output from the third voltage source ramps downward;

during a sixth time period immediately following the fifth time period, the voltage output from the first voltage source remains at a constant level, the voltage output from the second voltage source remains at a constant level, and the voltage output from the third voltage remains at a constant level;

during a seventh time period immediately following the sixth time period, the voltage output from the first voltage source ramps downward, the voltage output from the second voltage source remains at a constant level, and the voltage output from the third voltage remains at a constant level; and

during a eighth time period immediately following the seventh time period, the voltage output from the first voltage source remains ramps downward, the voltage output from the second voltage source ramps downward, and the voltage output from the third voltage ramps downward.

10. A method of operating a power management control system comprising a main power source, a core logic power source, and a power control unit, comprising:

providing a first detection ready output signal when an output voltage from the main power source passes a first predetermined level;

providing a second detection ready output signal when an output voltage from the core logic power source passes a second predetermined level;

enabling, by the power control unit in response to the first detection ready output signal, the supply of power from the main power source to an embedded flash memory device; and

enabling, by the power control unit in response to the second detection ready output signal, the supply of power from the core logic power source to the embedded flash memory device.

11. The method of claim 10 , further comprising:

enabling, by the power control unit, the supply of power from the main power source to a charge pump circuit.

Assignments (12)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
Continuity (3)
Division 15088038 · Mar 31, 2016
Division 14290779 · May 29, 2014
Related Publication 20170269662A1 · Sep 21, 2017