Granted Patent B2

US 7,724,842 · App. 11/476,966 · Granted May 25, 2010

Abstract

Claims (65)

1. A method for testing an electronic device that includes a transmitter portion and a receiver portion, the method performed by the electronic device and comprising the steps of:

the transmitter portion producing in-phase (I-) and quadrature phase (Q-) arrays from a bitstream;

the transmitter portion providing the I- and Q-arrays to the receiver portion;

the transmitter portion converting the bitstream to a complex waveform;

the transmitter portion transmitting the complex waveform;

the receiver portion receiving the complex waveform that was transmitted by the transmitter portion;

the receiver portion sampling an I-sample voltage and a Q-sample voltage from the complex waveform;

the receiver portion receiving the I- and Q-arrays from the transmitter portion;

the receiver portion selecting an I-ideal voltage from the I-array, and selecting a Q-ideal voltage from the Q-array, the I-ideal voltage being selected to be time-aligned with the I-sample voltage, the Q-ideal voltage being selected to be time-aligned with the Q-sample voltage;

determining an error vector by comparing the I- and Q-sample voltages with the I- and Q-ideal voltages;

repeating the producing, providing, converting, transmitting, receiving, sampling, selecting, and determining steps to produce a plurality of error vectors; and

determining a root mean square (RMS) from the plurality of the error vectors.

2. A method according to claim 1 further comprising prior to said step of sampling, the steps of:

down-converting the complex waveform to a baseband waveform;

digitizing the baseband waveform to a baseband array; and

producing time-aligned I- and Q-sample arrays from the baseband array.

3. A method according to claim 2 , wherein said step of sampling comprises:

sampling the I-sample voltage from the I-sample array at an array index; and

sampling the Q-sample voltage from the Q-sample array at the array index.

4. A method according to claim 2 further comprising:

recovering a carrier from the baseband array; and

determining a local oscillator (LO) frequency from the carrier; and

wherein said down-converting step comprises time-domain multiplying the complex waveform with the LO frequency.

5. A method according to claim 1 further comprising:

down-converting the complex waveform to a baseband waveform;

digitizing the baseband waveform to a baseband array;

demodulating the baseband array to produce time-aligned I- and Q-voltage arrays; and

determining at least one symbol from the time-aligned I- and Q-voltage arrays.

6. A method according to claim 5 further comprising:

filtering the baseband waveform prior to said digitizing step low-pass; and

digitally filtering the baseband array prior to said demodulating step.

7. A method for testing an electronic device that includes a transmitter portion and a receiver portion, the method performed by the electronic device and comprising the steps of:

the transmitter portion producing in-phase (I-) and quadrature phase (Q-) arrays from a data bitstream while converting the data bitstream to a radio frequency (RF) complex waveform;

the transmitter portion transmitting the RF complex waveform, the RF complex waveform associated with a baseband complex waveform;

the receiver portion receiving the RF complex waveform that was transmitted by the transmitter portion;

the receiver portion sampling an I-sample and a Q-sample from a version of the baseband complex waveform that is reconstructed from the RF complex waveform;

the receiver portion selecting a first ideal value from the I-array, the first ideal value being selected to be time-aligned with an I-sample of the baseband complex waveform;

the receiver portion selecting a second ideal value from the Q-array, the second ideal value being selected to be time-aligned with a Q-sample of the baseband complex waveform;

the receiver portion generating an error vector by comparing the first and second ideal values with the I- and Q-samples of the baseband complex waveform;

repeating said steps of producing the I- and Q-arrays, transmitting the RF complex waveform, receiving the RF complex waveform, sampling the I-sample and the Q-sample, selecting a first ideal value, said step of selecting a second ideal value, and said step of generating an error vector to produce a predetermined number of error vectors; and

determining a root mean square (RMS) from the pre-determined number of the error vectors.

8. A method according to claim 7 , wherein said step of producing I- and Q-arrays comprises:

converting the I- and Q-arrays to I- and Q-baseband waveforms;

up-converting the I- and Q-baseband waveforms to I- and Q-RF waveforms; and

combining the I- and Q-RF waveforms to produce the RF complex waveform.

9. A method according to claim 8 further comprising prior to said step of up-converting, anti-alias filtering the I- and Q-baseband waveforms.

10. A method according to claim 7 , wherein said step of producing I- and Q-arrays comprises:

mapping the data bitstream to at least one symbol;

producing even and odd bitstreams from the at least one symbol; and

filtering the even and odd bitstreams to produce the I- and Q-arrays.

11. A method according to claim 7 further comprising prior to said step of transmitting, amplifying the RF complex waveform.

12. An electronic device comprising:

a transmitter portion configured to produce in-phase (I-) and quadrature phase (Q-) ideal arrays from a bitstream, to convert the bitstream to a complex waveform, and to transmit the complex waveform in the form of a radio frequency (RF) signal;

a receiver portion coupled to the transmitter portion and configured to receive the RF signal and further configured to produce I- and Q-voltage arrays from said RF signal, said receiver comprising a test module configured to determine an error vector magnitude (EVM) from said I- and Q-ideal arrays and said I- and Q-voltage arrays by comparing a voltage from the I-voltage array with a time-aligned voltage selected from the I-ideal array, and by comparing a voltage from the Q-voltage array with a time-aligned voltage selected from the Q-ideal array, wherein the receiver portion is further configured to receive additional RF signals, produce the I- and Q-voltage arrays for the additional received RF signals, and determine additional EVMs for the additional received RF signals, and to determine a root mean square (RMS) from the EVM and the additional EVMs.

13. A self-testing system comprising:

a receiver portion configured to receive a radio frequency (RF) signal and further configured to produce I- and Q-voltage arrays from said RF signal, said receiver comprising a test module configured to receive in-phase (I-) and quadrature-phase (Q-) ideal arrays and further configured to determine an error vector magnitude (EVM) from said I- and Q-ideal arrays and said I- and Q-voltage arrays, wherein said test module comprises:

a sampling unit configured to select first and second sample values from said I- and Q-voltage arrays; and

an EVM calculator configured to:

determine first and second ideal values of said I- and Q-ideal arrays corresponding to said first and second sample values;

compare said first and second sample values with said first and second ideal values to determine said EVM;

repeating determining the first and second ideal values, and said step of comparing to determine said EVM in order to produce a predetermined number of EVMs; and

determining a root mean square (RMS) from the pre-determined number of the EVMs.

14. A self-testing system according to claim 13 further comprising a transmitter portion coupled to said test module and configured to produce said RF signal from said I- and Q-ideal arrays and further configured to transmit said RF signal to said receiver.

15. A self-testing system according to claim 14 , wherein said transmitter portion comprises a transmit-only integrated circuit (IC), and wherein said receiver portion comprises a receive-only IC.

16. A self-testing system according to claim 14 further comprising an IC having said transmitter portion and said receiver portion.

Assignments (22)