IP Library Granted Patent US 7,582,532
Granted Patent B2
US 7,582,532 · App. 11/477,866 · Granted Sep 1, 2009

Method for fabricating semiconductor device

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Quick Facts
Patent No.
US 7,582,532
App. No.
11/477,866
Granted
Sep 1, 2009
Kind
B2
Abstract

A method for fabricating a semiconductor device includes etching a predetermined portion of a substrate to form a first recess having a bottom middle portion roundly projected and bottom edge portions tapered to have a micro-trench profile; and etching the substrate beneath the first recess to form a second recess, the second recess being rounded and being wider than the first recess.

Claims (26)

1. A method for fabricating a semiconductor device, comprising:

etching a predetermined portion of a substrate to form a first recess having a bottom middle portion roundly projected and bottom edge portions tapered to have a micro-trench profile, the bottom edge portions being deeper than the bottom middle portion; and

etching the substrate beneath the first recess to form a second recess, the second recess being rounded and being wider than the first recess,

wherein forming the first recess includes performing a plasma etching with a mixture gas including a chlorine-based gas and an inert gas.

2. The method of claim 1 , wherein a percentage of the inert gas in the mixture gas ranges from 4% to 10%.

3. The method of claim 1 , wherein the chlorine-based gas includes boron trichloride (BCl 3 ).

4. The method of claim 1 , wherein the inert gas includes argon (Ar).

5. The method of claim 1 , wherein forming the first recess includes performing a plasma etching with a power ranging from 500 W to 2,000 W.

6. The method of claim 1 , wherein forming the first recess includes performing a plasma etching with a pressure ranging from 4 mTorr to 8 mTorr.

7. The method of claim 1 , wherein forming the second recess includes performing a plasma etching with a mixture gas including chlorine (Cl 2 ) gas and hydrogen bromide (HBr) gas.

8. The method of claim 1 , wherein the first recess and the second recess constitute a bulb-shaped recess.

9. The method of claim 1 , wherein forming the first recess includes etching the substrate using a mask pattern including an oxide-based layer and a polysilicon-based hard mask as an etch mask.

10. A method for fabricating a semiconductor device, comprising:

etching a predetermined portion of a substrate to form a first recess having a roundly projected bottom middle portion and bottom edge portions tapered to have a micro-trench profile, the bottom edge portions being deeper than the bottom middle portion;

etching the substrate beneath the first recess to form a second recess, the second recess being rounded and being wider than the first recess;

rounding top corners of the first recess;

forming a gate insulation layer over the substrate with the first recess and the second recess formed therein; and

forming a gate pattern having a first portion filled into the first and second recesses and a second portion projected above the substrate over the gate insulation layer;

wherein forming the first recess includes performing a plasma etching with a mixture gas including a chlorine-based gas and an inert gas.

11. The method of claim 10 , wherein a percentage of the inert gas in the mixture gas range from 4% to 10%.

12. The method of claim 10 , wherein the chlorine-based gas includes BCl 3 .

13. The method of claim 10 , wherein the inert gas includes Ar.

14. The method of claim 10 , wherein forming the first recess includes performing a plasma etching with a power ranging from 500 W to 2,000 W, and a pressure ranging from 4 mTorr to 8 mTorr.

15. The method of claim 10 , wherein forming the second recess includes performing a plasma etching with a mixture gas including Cl 2 and HBr.

16. The method of claim 10 , wherein forming the first recess includes etching the substrate using a mask pattern comprised of an oxide layer and a polysilicon hard mask as an etch mask.

17. The method of claim 10 , wherein rounding the top corners of the first recess includes performing a plasma etching with a mixture gas including tetrafluoromethane (CF 4 ) and oxygen (O 2 ).

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2006
From: HAN, KY-HYUN; KIM, SEUNG-BUM
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 018070/0638 →