Methods of forming SiC MOSFETs with high inversion layer mobility
View Patent ↗Methods of forming an oxide layer on silicon carbide include thermally growing an oxide layer on a layer of silicon carbide, and annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C. The oxide layer may be annealed in NO in a silicon carbide tube that may be coated with silicon carbide. To form the oxide layer, a preliminary oxide layer may be thermally grown on a silicon carbide layer in dry O 2 , and the preliminary oxide layer may be re-oxidized in wet O 2 .
1. A method of forming a silicon carbide MOS structure, comprising:
thermally growing an oxide layer on a layer of silicon carbide;
placing the oxide layer on the silicon carbide layer in a silicon carbide tube, wherein the silicon carbide tube comprises a tube of silicon carbide having a silicon carbide coating thereon;
annealing the oxide layer in the silicon carbide tube in an environment containing NO at a temperature greater than 1175° C.; and
forming a gate electrode on the oxide layer, wherein the gate electrode comprises polysilicon and/or a metal.
2. The method of claim 1 , wherein annealing the oxide layer comprises annealing the oxide layer in an environment containing NO at a temperature between about 1200° C. and about 1600° C.
3. The method of claim 1 , wherein annealing the oxide layer comprises annealing the oxide layer in an environment containing NO at a temperature of about 1300° C.
4. The method of claim 3 , wherein annealing the oxide layer comprises annealing the oxide layer for about 2 hours.
5. The method of claim 1 , wherein the silicon carbide coating on the silicon carbide tube comprises a silicon carbide coating deposited by chemical vapor deposition on the silicon carbide tube.
6. The method of claim 1 , wherein thermally growing the oxide comprises thermally growing the oxide in the presence of metallic impurities.
7. The method of claim 6 , wherein thermally growing the oxide comprises thermally growing the oxide in the presence of alumina including the metallic impurities.
8. The method of claim 1 , wherein thermally growing the oxide layer comprises thermally growing the oxide layer to a thickness of between about 500 Å and 900 Å.
9. The method of claim 1 , wherein the silicon carbide layer comprises an epitaxial layer of 4H p-type silicon carbide having an off-axis orientation that is tilted at about 8° from a (0001) plane.
10. The method of claim 1 , wherein thermally growing the oxide layer comprises:
thermally growing a preliminary oxide layer on the silicon carbide layer in dry O 2 at a temperature of about 1200° C.; and
re-oxidizing the preliminary oxide layer in wet O 2 at a temperature of about 950° C.
11. A method of forming a silicon carbide MOS structure, comprising:
thermally growing an oxide layer on a layer of silicon carbide wherein the silicon carbide layer comprises a region of p-type silicon carbide;
annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C.; and
forming a gate electrode on the oxide layer, wherein the gate electrode comprises polysilicon and/or a metal; and
forming an n-type region in the p-type silicon carbide region;
wherein thermally growing the oxide layer comprises thermally growing the oxide layer on the p-type silicon carbide region and at least partially on the n-type region;
wherein the p-type silicon carbide region comprises a p-type epitaxial layer;
wherein the n-type region comprises an n-type source region;
wherein the method further comprises forming an n-type drain region in the p-type epitaxial layer that is spaced apart from the n-type source region and defines a channel region between the source region and the drain region; and
wherein thermally growing the oxide layer comprises thermally growing the oxide layer on the channel region.
12. The method of claim 11 , further comprising:
forming ohmic contacts on the n-type source region and the n-type drain region; and
annealing the ohmic contacts on the n-type source region and the n-type drain region at a temperature of at least about 500° C.;
wherein the channel region has a channel mobility of at least about 40 cm 2 /Vs at room temperature following the ohmic contact anneal.
13. A method of forming a silicon carbide MOS structure, comprising:
thermally growing an oxide layer on a layer of silicon carbide wherein the silicon carbide layer comprises a region of p-type silicon carbide;
annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C.;
forming a gate electrode on the oxide layer, wherein the gate electrode comprises polysilicon and/or a metal; and
forming an n-type region in the p-type silicon carbide region;
wherein thermally growing the oxide layer comprises thermally growing the oxide layer on the p-type silicon carbide region and at least partially on the n-type region;
wherein the p-type silicon carbide region comprises an implanted p-type well region;
wherein the n-type region comprises an n-type source region; and
wherein the method further comprises forming the implanted p-type well region adjacent an n-type JFET region that extends from a surface of the structure to a drift region disposed beneath the p-type well region; and wherein thermally growing the oxide layer comprises thermally growing the oxide layer on a channel region extending in the p-type well region between the source region and the JFET region.
14. The method of claim 11 , further comprising:
forming an ohmic contact on the n-type source region; and
annealing the ohmic contact on the n-type source region at a temperature of at least about 500° C.;
wherein the channel region has a channel mobility of at least about 35 cm 2 /Vs at room temperature following the ohmic contact anneal.