IP Library Granted Patent US 7,579,898
Granted Patent B2
US 7,579,898 · App. 11/496,359 · Granted Aug 25, 2009

Temperature sensor device and methods thereof

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Quick Facts
Patent No.
US 7,579,898
App. No.
11/496,359
Granted
Aug 25, 2009
Kind
B2
Abstract

A device having a temperature sensor device is disclosed. The temperature sensor device includes a complementary to absolute temperature (CTAT) module and a reference module. Both the temperature sensor and the reference voltage module provide signals, that vary in a complementary relationship with the variation in temperature. While the signals can be voltages or currents, for purposes of discussion the signals are discussed in terms of voltages herein. The reference module provides a signal that has a relatively small variation with temperature as compared to the variation in a signal provided by the CTAT module. The signals are provided to a comparator, which provides a temperature control signal based on a comparison of the input signals.

Claims (40)

1. A device, comprising:

a first transistor comprising a control electrode coupled to a first voltage reference, a first current electrode to provide a CTAT signal relative a voltage at the control electrode, and a second current electrode coupled to the first voltage reference;

a second transistor comprising a control electrode coupled to a second voltage reference, a first current electrode to provide a PTAT signal, and a second current electrode coupled to the first voltage reference;

a comparator comprising a first input coupled to the first current electrode of the first transistor, a second input coupled to the first current electrode of the second transistor, and an output; and

a first level shifter coupled between the first transistor and the first input of the comparator.

2. The device of claim 1 , wherein the first transistor is a bipolar junction transistor and the second transistor is a field effect transistor.

3. The device of claim 1 , further comprising:

a power control module comprising an input coupled to the output of the comparator, wherein the power control module is configured to change a first power mode of a first module of an integrated circuit device based on a signal provided by the comparator while maintaining a power mode of a second module of the integrated circuit device.

4. The device of claim 1 , wherein the first level shifter comprises a third transistor comprising a first current electrode coupled to the second voltage reference, a second current electrode coupled to the second voltage reference, and a control electrode coupled to the first current electrode of the first transistor.

5. The device of claim 4 , wherein the device further comprises a fourth transistor comprising a first current electrode coupled to the second input of the comparator, a second current electrode coupled to the first voltage reference, and a control electrode coupled to the first current electrode of the second transistor.

6. The device of claim 5 , wherein the third transistor and the fourth transistor are bipolar junction transistors.

7. The device of claim 5 , further comprising:

a fifth transistor comprising a first current electrode coupled to the control electrode of the second transistor, a second current electrode coupled to the first current electrode of the second transistor, and a control electrode coupled to the first current electrode of the fifth transistor.

8. The device of claim 7 , wherein the fifth transistor is a field effect transistor.

9. The device sensor of claim 7 , further comprising:

a first current source comprising an input and an output coupled to the first current electrode of the third transistor, the output to provide a first current based on a signal at the input.

10. The device of claim 9 , wherein the first current source comprises a sixth transistor comprising a first current electrode coupled to the second voltage reference, a second current electrode coupled to the first current electrode of the third transistor, and a control electrode coupled to a current reference.

11. The device of claim 10 , further comprising:

a second current source comprising an input and an output coupled to the first current electrode of the fourth transistor, the output to provide a first current based on a signal at the input;

a third current source comprising an input and an output coupled to the first current electrode of the fifth transistor, the output to provide a first current based on a signal at the input.

12. The device of claim 11 , wherein the second current source comprises a seventh transistor comprising a first current electrode coupled to the second voltage reference, a second current electrode coupled to the first current electrode of the fourth transistor, and a control electrode coupled to the current reference, and the third current source comprises an eighth transistor comprising a first current electrode coupled to the first voltage reference, a second current electrode coupled to the first current electrode of the fifth transistor, and a control electrode coupled to the current source.

13. The device of claim 1 , further comprising:

a power control module comprising an input coupled to the output of the comparator, wherein the power control module controls a power level of an integrated circuit device based on a state of a signal provided at the output of the comparator.

14. The device of claim 13 , wherein the power control module controls a voltage domain of the integrated circuit device.

15. The device of claim 13 , wherein the power control module controls gating of a clock of the integrated circuit device.

16. A method, comprising:

generating a first signal that varies inversely with respect to temperature at a first rate, the first signal being an electrical signal;

generating a second signal that varies inversely with respect to temperature at a second rate, the second rate different from the first rate;

providing a temperature level indication signal based on a comparison of the first signal to the second signal; and

gating a clock signal based on the temperature level indication signal.

17. The method of claim 16 , wherein a voltage level of the first signal and a voltage level of the second signal are complementary to absolute temperature (CTAT) voltage levels.

18. The method of claim 16 , wherein gating the clock signal comprises:

gating the clock signal to place a first module of an integrated circuit device in a low-power mode in response to the temperature level indication being at first logic level.

19. The method of claim 16 , wherein gating the clock signal comprises:

gating the clock signal to place a first module of an integrated circuit device in a normal-power mode in response to the temperature level indication being at a second logic level.

20. A device, comprising:

means for generating a first signal that varies inversely with respect to temperature at a first rate;

means for generating a second signal that varies inversely with respect to temperature at a second rate, the second rate different from the first rate; and

means for providing a temperature level indication signal based on a comparison of the first signal to the second signal; and

means for controlling a first power mode of a first module of an integrated circuit device based on the temperature level indication signal while maintaining a second power mode of a second module of the integrated circuit device.

Assignments (32)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
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From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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From: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
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