IP Library Granted Patent US 7,705,483
Granted Patent B2
US 7,705,483 · App. 11/526,051 · Granted Apr 27, 2010

DC-DC converter control circuit, DC-DC converter, power supply unit, and DC-DC converter control method

Assignee: Fujitsu Microelectronics Limited
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Quick Facts
Patent No.
US 7,705,483
App. No.
11/526,051
Granted
Apr 27, 2010
Kind
B2
Abstract

An object of the present invention is to provide a DC-DC converter control circuit capable of maintaining, even when any one of a plural number of DC-DC converters enters the abnormal state due to the occurrence of a failure, a voltage relationship between the output voltage of the faulty DC-DC converter and the output voltage of another DC-DC converter. An error amplifier ERA 1 G has an inverting input, a first non-inverting input, and a second non-inverting input. A first divided voltage VV 1 provided from a first voltage divider circuit VD 1 is fed into the inverting input; a reference voltage e 1 G from ground is fed into the first non-inverting input; and a second divided voltage VV 2 provided from a second voltage divider circuit VD 2 is fed into the second non-inverting input. The error amplifier ERA 1 G amplifies the error between the lower of the two voltage inputs fed into the two non-inverting inputs (i.e. the lower of the reference voltage e 1 G and the second divided voltage VV 2 ), and the first divided voltage VV 1 fed into the inverting input. The output terminal of the error amplifier ERA 1 G is connected to the input terminal of a PWM unit P 1 G.

Claims (64)

1. A control circuit for a DC-DC converter which provides a plurality of output voltages, the control circuit comprising:

an error amplifier which includes:

a first polarity input terminal at which a voltage according to a first output voltage of the plurality of output voltages is input;

a second polarity first input terminal at which a reference voltage for setting a target value for the first output voltage is input; and

a second polarity second input terminal at which a voltage according to a second output voltage being output from another DC-DC converter is input,

wherein the error amplifier amplifies an error between: (i) lower one of voltages between the voltage input at the second polarity first input terminal and the voltage input at the second polarity second input terminal; and (ii) the voltage input at the first polarity input terminal,

wherein the control circuit controls the voltage according to the first output voltage so as to keep a relation between the voltage according to the first output voltage and the voltage according to the second output voltage based on the error.

2. The control circuit as set forth in claim 1 , wherein the error amplifier includes a plurality of the second polarity second input terminals, respectively, associated with a plurality of the second output voltages, and amplifies an error between: (i) lower one of voltages between (a) a lowest voltage among voltages input at the plurality of the second polarity second input terminals and (b) the voltage input at the second polarity first input terminal; and (ii) the voltage input at the first polarity input terminal.

3. The control circuit as set forth in claim 1 further comprising:

a first voltage divider circuit to which the first output voltage is input and which divides the first output voltage to thereby provide a first divided voltage to the error amplifier; and

a second voltage divider circuit to which the second output voltage is input and which divides the second output voltage to thereby provide a second divided voltage to the error amplifier;

wherein a value of a ratio of the second divided voltage to the second output voltage of the second voltage divider circuit is made equal to or less than a value of a ratio of the first divided voltage to the first output voltage of the first voltage divider circuit.

4. The control circuit as set forth in claim 3 further comprising:

a control circuit for the another DC-DC converter which provides the second output voltage; and

a third voltage divider circuit to which the second output voltage is input and which divides the second output voltage to thereby provide a third divided voltage to an error amplifier provided in the control circuit for the another DC-DC converter,

wherein a value of a ratio of the third divided voltage to the second output voltage of the third voltage divider circuit is made less than the value of the ratio of the first divided voltage to the first output voltage of the first voltage divider circuit.

5. The control circuit as set forth in claim 1 , wherein:

the error amplifier has a second polarity third input terminal to which a capacitor which is charged or discharged by ramp gradient control is connected; and

the error amplifier amplifies an error between: (i) a lowest voltage among the voltages input at the second polarity first to third input terminals; and (ii) the voltage input at the first polarity input terminal.

6. The control circuit as set forth in claim 1 further comprising an inversion amplifier circuit which inverts a polarity of the first output voltage to be input to the first polarity input terminal

wherein the first output voltage is a voltage of an opposite polarity to the second output voltage.

7. The control circuit as set forth in claim 1 ,

wherein the error amplifier further comprises a second polarity third input terminal at which a voltage according to a third output voltage being output from another DC-DC converter is input, and

wherein the error amplifier amplifies an error between: (i) a lowest voltage among the voltage input at the second polarity first input terminal, the voltage input at the second polarity second input terminal and the voltage input at the second polarity third input terminal; and (ii) the voltage input at the first polarity input terminal.

8. A DC-DC converter which provides a plurality of output voltages, the DC-DC converter comprising:

an error amplifier which includes:

a first polarity input terminal at which a voltage according to a first output voltage of the plurality of output voltages is input;

second polarity first input terminal at which a reference voltage for setting a target value for the first output voltage is input; and

a second polarity second input terminal at which a voltage according to a second output voltage being output from another DC-DC converter is input,

wherein the error amplifier amplifies an error between: (i) lower one of voltages between the voltage input at the second polarity first input terminal and the voltage input at the second polarity second input terminal; and (ii) the voltage input at the first polarity input terminal,

wherein the DC-DC converter controls the voltage according to the first output voltage so as to keep a relation between the voltage according to the first output voltage and the voltage according to the second output voltage based on the error.

9. The DC-DC converter as set forth in claim 8 further comprising:

a first voltage divider circuit to which the first output voltage is input and which divides the first output voltage to thereby provide a first divided voltage to the error amp 1 ifier;

a second voltage divider circuit to which the second output voltage is input and which divides the second output voltage to thereby provide a second divided voltage to the error amplifier;

a control circuit for the another DC-DC converter which provides the second output voltage; and

a third voltage divider circuit to which the second output voltage is input and which divides the second output voltage to thereby provide a third divided voltage to an error amplifier provided in the control circuit for the another DC-DC converter,

wherein a value of a ratio of the second divided voltage to the second output voltage of the second voltage divider circuit is made equal to or less than a value of a ratio of the first divided voltage to the first output voltage of the first voltage divider circuit, and

wherein a value of a ratio of the third divided voltage to the second output voltage of the third voltage divider circuit is made less than the value of the ratio of the first divided voltage to the first output voltage of the first voltage divider circuit.

10. The DC-DC converter as set forth in claim 8 ,

wherein the error amplifier further comprises a second polarity third input terminal at which a voltage according to a third output voltage being output from another DC-DC converter is input, and

wherein the error amplifier amplifies an error between: (i) a lowest voltage among the voltage input at the second polarity first input terminal, the voltage input at the second polarity second input terminal and the voltage input at the second polarity third input terminal; and (ii) the voltage input at the first polarity input terminal.

11. A semiconductor device for controlling a DC-DC converter which provides a plurality of output voltages the semiconductor device comprising:

an error amplifier which includes:

a first polarity input terminal at which a voltage according to a first output voltage of the plurality of output voltages is input;

a second polarity first input terminal at which a reference voltage for setting a target value for the first output voltage is input; and

a second polarity second input terminal at which a voltage according to a second output voltage being output from another DC-DC converter is input,

wherein the error amplifier amplifies an error between: (i) lower one of voltages between the voltage input at the second polarity first input terminal and the voltage input at the second polarity second input terminal; and (ii) the voltage input at the first polarity input terminal,

wherein the semiconductor device controls the voltage according to the first output voltage so as to keep a relation between the voltage according to the first output voltage and the voltage according to the second output voltage based on the error.

12. The semiconductor device as set forth in claim 11 further comprising:

a first voltage divider circuit to which the first output voltage is input and which divides the first output voltage to thereby provide a first divided voltage to the error amplifier;

a second voltage divider circuit to which the second output voltage is input and which divides the second output voltage to thereby provide a second divided voltage to the error amplifier;

a control circuit for the another DC-DC converter which provides the second output voltage; and

a third voltage divider circuit to which the second output voltage is input and which divides the second output voltage to thereby provide a third divided voltage to an error amplifier provided in the control circuit for the another DC-DC converter,

wherein a value of a ratio of the second divided voltage to the second output voltage of the second voltage divider circuit is made equal to or less than a value of a ratio of the first divided voltage to the first output voltage of the first voltage divider circuit, and

wherein a value of a ratio of the third divided voltage to the second output voltage of the third voltage divider circuit is made less than the value of the ratio of the first divided voltage to the first output voltage of the first voltage divider circuit.

13. The semiconductor device as set forth in claim 11 ,

wherein the error amplifier further comprises a second polarity third input terminal at which a voltage according to a third output voltage being output from another DC-DC converter is input, and

wherein the error amplifier amplifies an error between: (i) a lowest voltage among the voltage input at the second polarity first input terminal, the voltage input at the second polarity second input terminal and the voltage input at the second polarity third input terminal; and (ii) the voltage input at the first polarity input terminal.

14. A control method for controlling a DC-DC converter which provides a plurality of output voltages, the DC-DC converter control method comprising:

outputting a voltage according to a first output voltage of the plurality of output voltages;

outputting a reference voltage for setting a target value for the first output voltage;

outputting a voltage according to a second output voltage being output from another DC-DC converter; and

amplifying an error between: (i) lower one of voltages between the reference voltage and the voltage according to the second output voltage; and (ii) the voltage according to the first output voltage,

wherein the control method controls the voltage according to the first output voltage so as to keep a relation between the voltage according to the first output voltage and the voltage according to the second output voltage based on the error.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036043/0013 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2006
From: OZAWA, HIDEKIYO; HASEGAWA, MORIHITO
To: FUJITSU LIMITED
Reel/Frame 018342/0015 →
Priority Claims (1)
JP 2006-058861 · Mar 6, 2006 · national
Continuity (1)
Related Publication 20070210649A1 · Sep 13, 2007