IP Library Granted Patent US 7,675,267
Granted Patent B2
US 7,675,267 · App. 11/527,496 · Granted Mar 9, 2010

Control circuit of power supply and control method of the power supply

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Quick Facts
Patent No.
US 7,675,267
App. No.
11/527,496
Granted
Mar 9, 2010
Kind
B2
Abstract

This invention aims at providing a control circuit of power supply in which a secondary battery and a device are connected in parallel, to output capable of preventing over-charging of the secondary battery and supplying power from the secondary battery to the device, and a control method of the power supply. A device 5 G and a secondary battery 2 G are connected to a DC-DC converter 1 G in parallel. The device 5 G is supplied with both a power from the DC-DC converter 1 G and a power from the secondary battery 2 G. When the secondary battery 2 G is in non-charging state, an offset circuit 15 G supplies a positive offset for reducing a difference of voltage between a detection signal Vx 1 G and reference voltage e 1 G to a reference voltage e 1 G corresponding to a charging inhibit signal CAS. An error amplifier ERA 1 G reduces an actually flowing charging current CCG by an amount corresponding to the offset value as a result of recognizing that the charging current CCG flows more by the amount corresponding to the offset value.

Claims (29)

1. A control circuit of a power supply for supplying power to a secondary battery and a load, comprising:

an offset circuit for supplying an offset value with a detection signal corresponding to a charging current to the secondary battery or a reference signal for setting a current value of the charging current to a given value, and determining whether or not to supply the offset value based on a charging stop instruction of the secondary battery; and

a charging control circuit for controlling an output voltage so that the charging current to the secondary battery decreases to a value corresponding to the offset value.

2. The control circuit of the power supply according to claim 1 ,

wherein the charging control circuit comprises a first error amplifier for amplifying a difference between the detection signal corresponding to the charging current and the reference signal for setting the given value of the charging current, and

wherein the offset value is a value for reducing the difference which indicates that a current value of the charging current has not reached the given value.

3. The control circuit of the power supply according to claim 2 ,

wherein the offset circuit comprises:

an offset generating circuit for generating the offset value that increases an absolute value of a voltage value of the detection signal; and

a first selector circuit for adding the offset value to the detection signal in response to the charging stop instruction, the first selector circuit being provided on a transmission path of the detection signal.

4. The control circuit of the power supply according to claim 3 , wherein the offset value is a value greater than a value of the reference signal.

5. The control circuit of the power supply according to claim 2 ,

wherein the offset circuit comprises:

a reference signal generating circuit for generating the reference signal; and

a second selector circuit for outputting the reference signal when the charging stop instruction is not dispatched and further outputting a grounding voltage in response to the charging stop instruction, the second selector circuit being provided on a transmission path of the reference signal, and

wherein an absolute value of a voltage value of the grounding voltage is smaller than an absolute value of a voltage value of the reference voltage.

6. The control circuit of the power supply according to claim 1 further comprising a comparator for, when the secondary battery is in a non-charging state, comparing the output voltage of the secondary battery with a predetermined setting voltage.

7. The control circuit of the power supply according to claim 1 , wherein the load and the secondary battery are connected in parallel to the power supply.

8. The control circuit of the power supply according to claim 1 further comprising an output transistor constituted of a MOS transistor having quadrupolar structure with its back gate connected to grounding voltage.

9. A power supply for supplying power to a secondary battery and a load, comprising:

an offset circuit for supplying an offset value with a detection signal corresponding to a charging current to the secondary battery or a reference signal for setting a current value of the charging current to a given value, and determining whether or not to supply the offset value based on a charging stop instruction of the secondary battery; and

a charging control circuit for controlling an output voltage so that the charging current to the secondary battery decreases to a value corresponding to the offset value.

10. A control method of a power supply for supplying power to a secondary battery and a load comprising:

supplying an offset value with a detection signal corresponding to a charging current to the secondary battery or a reference signal for setting a current value of the charging current to a given value;

determining whether or not to supply the offset value based on a charging stop instruction of the secondary battery; and

controlling an output voltage so that the charging current to the secondary battery decreases to a value corresponding to the offset value.

11. The control method of the power supply according to claim 10 further comprising:

amplifying a difference between the detection signal corresponding to the charging current and the reference signal for setting the given value of the charging current,

wherein the offset value is a value for reducing the difference which indicates that a current value of the charging current has not reached the given value.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036049/0581 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021977/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2006
From: OZAWA, HIDEKIYO; MATSUMOTO, TAKASHI; YOSHINO, TAKAHIRO; NAKAMURA, TORU
To: FUJITSU LIMITED
Reel/Frame 018345/0938 →