Patent Assignment
Reel/Frame 036049/0581
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2015-07-01
Received: 2015-07-01
Pages: 153
Assignor
SPANSION, LLC
Executed: 2015-06-01
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Applications
(51)
INFUSION PUMP
App. No. 29/362,566
→
DIE OFFSET DIE TO BONDING
App. No. 12/316,041
→
RESET SIGNAL GENERATION CIRCUIT
App. No. 12/289,030
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NONVOLATILE MEMORY DEVICE AND METHOD TO CONTROL THE SAME
App. No. 12/060,710
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CLOCK SIGNAL TRANSMISSION CIRCUIT
App. No. 12/048,960
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AD CONVERTER CIRCUIT AND MICROCONTROLLER
App. No. 12/035,899
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CHARGE PUMP TO SUPPLY VOLTAGE BANDS
App. No. 12/012,389
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TABLE LOOKUP VOLTAGE COMPENSATION FOR MEMORY CELLS
App. No. 12/006,744
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ARRAYED NEUTRON DETECTOR WITH MULTI SHIELDING ALLOWING FOR DISCRIMINATION BETWEEN RADIATION TYPES
App. No. 11/966,672
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CONTROLLING AC DISTURBANCE WHILE PROGRAMMING
App. No. 11/963,508
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WORK FUNCTION ENGINEERING FOR FN ERASE OF A MEMORY DEVICE WITH MULTIPLE CHARGE STORAGE ELEMENTS IN AN UNDERCUT REGION
App. No. 11/953,690
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FLEXIBLE WORD LINE BOOSTING ACROSS VCC SUPPLY
App. No. 11/951,263
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HIGH SPEED CASCODE CIRCUIT WITH LOW POWER CONSUMPTION
App. No. 11/986,509
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FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT
App. No. 11/874,076
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CONTROLLED RAMP RATES FOR METAL BITLINES DURING WRITE OPERATIONS FROM HIGH VOLTAGE DRIVER FOR MEMORY APPLICATIONS
App. No. 11/872,989
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CIRCUIT FOR CORRECTING SENSOR TEMPERATURE CHARACTERISTICS
App. No. 11/902,798
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POWER SUPPLY SYSTEM AND METHOD FOR CONTROLLING OUTPUT VOLTAGE
App. No. 11/898,575
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CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
App. No. 11/894,828
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DC-DC CONVERTER
App. No. 11/826,261
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MULTI-LEVEL OPERATION IN DUAL ELEMENT CELLS USING A SUPPLEMENTAL PROGRAMMING LEVEL
App. No. 11/771,961
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SELF ALIGNED MEMORY ELEMENT AND WORDLINE
App. No. 11/750,724
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MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY
App. No. 11/745,327
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ADAPTIVE DETECTION OF THRESHOLD LEVELS IN MEMORY
App. No. 11/742,371
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DEEP BITLINE IMPLANT TO AVOID PROGRAM DISTURB
App. No. 11/646,157
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FLASH MEMORY DEVICE WITH EXTERNAL HIGH VOLTAGE SUPPLY
App. No. 11/613,383
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METHODS FOR FABRICATING A SPLIT CHARGE STORAGE NODE SEMICONDUCTOR MEMORY
App. No. 11/614,048
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METHODS FOR FABRICATING A MEMORY DEVICE INCLUDING A DUAL BIT MEMORY CELL
App. No. 11/614,050
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SYSTEM AND METHOD FOR MAINTAINING RAM COMMAND TIMING ACROSS PHASE-SHIFTED TIME DOMAINS
App. No. 11/642,412
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P-CHANNEL NAND IN ISOLATED N-WELL
App. No. 11/567,257
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METHOD OF SELECTING OPERATING CHARACTERISTICS OF A RESISTIVE MEMORY DEVICE
App. No. 11/590,378
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METHODS FOR CONTROLLING THE PROFILE OF A TRENCH OF A SEMICONDUCTOR STRUCTURE
App. No. 11/538,403
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CONTROL CIRCUIT OF POWER SUPPLY AND CONTROL METHOD OF THE POWER SUPPLY
App. No. 11/527,496
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CIRCUIT AND METHOD FOR CONTROLLING DC-DC CONVERTER
App. No. 11/512,318
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ELECTRONIC DEVICE INCORPORATING SYSTEM POWER SUPPLY UNIT AND METHOD FOR SUPPLYING POWER SUPPLY VOLTAGE
App. No. 11/512,334
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CURRENT-CONTROLLED DC-DC CONVERTER CONTROL CIRCUIT, CURRENT-CONTROLLED DC-DC CONVERTER, AND METHOD FOR CONTROLLING CURRENT-CONTROLLED DC-DC CONVERTER
App. No. 11/447,853
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SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF
App. No. 11/438,324
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METHOD FOR IMPROVING PERFORMANCE IN A MOBILE DEVICE
App. No. 11/414,845
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SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD THEREFOR
App. No. 11/414,081
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SEMICONDUCTOR DEVICE WITH REDUCED TRANSISTOR BREAKDOWN VOLTAGE FOR PREVENTING SUBSTRATE JUNCTION CURRENTS
App. No. 11/414,082
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SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD THEREFOR
App. No. 11/414,647
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FLASH MEMORY PROGRAMMING AND VERIFICATION WITH REDUCED LEAKAGE CURRENT
App. No. 11/398,415
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FAST RAIL-TO-RAIL VOLTAGE COMPARATOR AND METHOD FOR RAIL-TO-RAIL VOLTAGE COMPARISON
App. No. 11/336,464
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NON-VOLATILE SONOS-TYPE MEMORY DEVICE
App. No. 11/319,999
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SEMICONDUCTOR DEVICE, FABRICATING METHOD THEREOF, AND PHOTOMASK
App. No. 11/291,318
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SYSTEM AND METHOD FOR PROCESSING AN ORGANIC MEMORY CELL
App. No. 11/256,558
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MEMORY DEVICES WITH ACTIVE AND PASSIVE LAYERS HAVING MULTIPLE SELF-ASSEMBLED SUBLAYERS
App. No. 11/228,975
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MEMORY CELL DUAL POCKET IMPLANT
App. No. 11/211,509
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MICROCONTROLLER
App. No. 11/146,237
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INPUT OF TEST CONDITIONS AND OUTPUT GENERATION FOR BUILT-IN SELF TEST
App. No. 11/006,034
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SEMICONDUCTOR DEVICE HAVING A PAD METAL LAYER AND A LOWER METAL LAYER THAT ARE ELECTRICALLY COUPLED, WHEREAS APERTURES ARE FORMED IN THE LOWER METAL LAYER BELOW A CENTER AREA OF THE PAD METAL LAYER
App. No. 10/823,970
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NITRIDATION OF GATE OXIDE BY LASER PROCESSING
App. No. 10/273,184
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