Granted Patent B2

US 7,482,793 · App. 11/530,548 · Granted Jan 27, 2009

Abstract

Claims (25)

1. A buck switching regulator formed on an integrated circuit and receiving an input voltage, the buck switching regulator controlling a first switch and a second switch using a fixed on-time, minimum off-time feedback control scheme to drive a switch output node for generating a switching output voltage, the switch output node being coupled to an LC filter circuit external to the integrated circuit to generate a regulated output voltage having a substantially constant magnitude on an output node, the regulated output voltage being fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node, the buck switching regulator comprising:

a first capacitor and a first resistor formed on the integrated circuit of the buck switching regulator, the first capacitor and the first resistor being connected in series between the switch output node and the feedback voltage node; and

a second capacitor coupled between the output node and the feedback voltage node,

wherein the first capacitor and the first resistor generate a ripple voltage signal being related to the switching output voltage and provide the ripple voltage signal to the feedback voltage node for use in the fixed on-time, minimum off-time feedback control scheme, the magnitude of the ripple voltage signal being a function of the capacitance value of the second capacitor.

2. The buck switching regulator of claim 1 , wherein the second capacitor is formed external to the integrated circuit of the buck switching regulator.

3. The buck switching regulator of claim 1 , wherein the second capacitor is formed on the integrated circuit of the buck switching regulator.

4. The buck switching regulator of claim 2 , wherein the LC filter circuit includes a first inductor and an output capacitor and the second capacitor has a capacitance value related to the equivalent series resistance (ESR) value of the output capacitor.

5. The buck switching regulator of claim 4 , wherein the second capacitor has a large capacitance value when the output capacitor has a large ESR value and the second capacitor has a small capacitance value when the output capacitor has a small or has a zero ESR value.

6. The buck switching regulator of claim 5 , wherein the second capacitor has a large capacitance value of about 2.2 nF and a small capacitance value of about 220 pF.

7. The buck switching regulator of claim 5 , wherein the ripple voltage signal has a small magnitude when the second capacitor has a large capacitance value and the ripple voltage signal has a large magnitude when the second capacitor has a small capacitance value.

8. The buck switching regulator of claim 3 , wherein the LC filter circuit includes a first inductor and an output capacitor and the second capacitor has a capacitance value related to a range of equivalent series resistance (ESR) values of the output capacitor.

9. The buck switching regulator of claim 1 , wherein the ripple voltage signal is a divided down voltage of the switching output voltage.

10. A method in buck switching regulator receiving an input voltage and controlling a first switch and a second switch using a fixed on-time, minimum off-time feedback control scheme to drive a switch output node for generating a switching output voltage, the switch output node being coupled to an LC filter circuit to generate a regulated output voltage having a substantially constant magnitude on an output node, the regulated output voltage being fed back to the buck switching regulator to a voltage divider for generating a feedback voltage on a feedback voltage node, the method comprising:

generating a ripple voltage signal from the switching output voltage;

injecting the ripple voltage signal to the feedback voltage node for use in the fixed on-time, minimum off-time feedback control scheme; and

adjusting the magnitude of the ripple voltage signal at the feedback voltage node using a capacitive divider.

11. The method of claim 10 , further comprising:

providing a first capacitor and a first resistor connected in series between the switch output node and the feedback voltage node, the first capacitor and the first resistor generating the ripple voltage signal from the switching output voltage and injecting the ripple voltage signal to the feedback voltage node.

12. The method of claim 11 , wherein the ripple voltage signal is a divided down voltage of the switching output voltage.

13. The method of claim 11 , wherein adjusting the magnitude of the ripple voltage signal at the feedback voltage node using a capacitive divider comprises:

providing a second capacitor between the output voltage node and the feedback voltage node, the magnitude of the ripple voltage signal being a function of the capacitance value of the second capacitor.

14. The method of claim 13 , wherein the LC filter circuit includes a first inductor and an output capacitor and the second capacitor has a capacitance value related to the equivalent series resistance (ESR) value of the output capacitor.

15. The method of claim 14 , wherein providing a second capacitor comprises providing a second capacitor having a large capacitance value when the output capacitor has a large ESR value and providing a second capacitor having a small capacitance value when the output capacitor has a small or has a zero ESR value.

16. The method of claim 15 , wherein the second capacitor has a large capacitance value of about 2.2 nF and a small capacitance value of about 220 pF.

17. The method of claim 13 , wherein the ripple voltage signal has a small magnitude when the second capacitor has a large capacitance value and the ripple voltage signal has a large magnitude when the second capacitor has a small capacitance value.

Assignments (10)