Serial link output stage differential amplifier and method
View Patent ↗Protection for the transmission of higher amplitude outputs required of differential amplifiers formed by thin oxide transistors with limited maximum voltage tolerance used where compliance with communication protocol standards requires handling voltages which may, in transition, exceed desirable levels is provided by limiting the voltage across any two device terminals under power down conditions.
1. Method comprising:
employing a differential amplifier circuit in an environment where a minimum output amplitude must be met for compliance with a communication protocol, the employed differential amplifier comprises a coupled pair of field effect transistor semiconductor devices; and
protecting the differential amplifier circuit from degradation otherwise possibly occurring by coupling a biasing circuit to the differential amplifier circuit through a coupling circuit which comprises a field effect transistor semiconductor device and which recognizes a powering down event for the differential amplifier circuit and applying a biasing voltage from the biasing circuit to the differential amplifier circuit during the recognized powering down event, the biasing voltage protecting the differential amplifier circuit against degradation otherwise possible due to voltages imposed during the powering down event, the coupling circuit field effect transistor semiconductor device being coupled with the source and body terminals of the coupled pair of field effect transistor semiconductor devices.
2. Method according to claim 1 wherein the employed differential amplifier comprises a coupled pair of complementary metal oxide field effect transistor semiconductor devices.