Thermally stable reference voltage generator for MRAM
View Patent ↗A non volatile memory device comprises memory cells such as MRAM cells, reading circuits and a reference cell for generating a reference for use by the reading circuits, and can determine if the reference is degraded by thermal instability. This can help reduce a data error rate. Detecting such degradation can prove to be more effective than trying to design in enough margins for the lifetime of the device. The reference cell can be less susceptible to degradation than other cells by using different shape of cells and different write currents. Where each reference cell is used by many memory cells, the reference cell tends to be used more often than any particular memory cell and so can be more susceptible to degradation. Another way of ensuring against longer term degradation of the reference is periodically rewriting the reference cell.
1. A non volatile memory device comprising:
a series of memory cells for providing data signals representative of a stored series of data values;
at least one reference cell for generating a reference signal;
a reader capable of determining the series of data values from the signals read from the series of memory cells and from the at least one reference cell;
a reference degrade detector capable of determining when the reference signal is degraded; and
a reference rewriter capable of rewriting the reference cell in response to the reference degrade detector determining that the reference signal is degraded,
wherein the reference cell has a given degradation susceptibility,
wherein the reference degrade detector comprises:
a reference test cell having a susceptibility greater than said given susceptibility of the reference cell;
a reference test cell read circuit for reading the values of the reference test cell; and
a reference test cell error detector capable of detecting test errors in the read values of the reference test cell, and
wherein the reference cell detector determines the reference signal is degraded based on said detecting test errors in the read values of the reference test cell.
2. The device of claim 1 , wherein the reference degrade detector is capable of
detecting errors in the series of data values read from the series of memory cells and is capable of determining the reference signal is degraded based on said detecting errors.
3. The device of claim 2 , further comprising:
a data corrector circuit capable of correcting at least one error in the series of data values read from the series of memory cells.
4. The device of claim 1 , wherein the reference signal comprises a midpoint reference.
5. The device of claim 1 wherein the reference cell is arranged to be less susceptible to the degradation than the series of memory cells.