Signal detection device and methods thereof
View Patent ↗A device for detecting synchronization pulses in a video signal is disclosed. The device includes a transistor. The base-emitter voltage of the transistor is maintained below a threshold level in response to receiving active video information. The base-emitter voltage is increased above the threshold level in response to receiving synchronization information, whereby the transistor is turned on to generate an asserted synchronization signal. Accordingly, in response to active video information being received and the transistor being off, the magnitude of the synchronization signal is set to a first level and in response to synchronization information being received, and the transistor being on, the magnitude is set to a second level. The synchronization signal generated by the transistor is processed to provide both horizontal and vertical synchronization signals.
1. A device, comprising
an input node configured to receive a composite video signal that provides active video information during a first interval and synchronization information during a second interval;
a first capacitor comprising a first electrode coupled to the input node and a second electrode;
a first transistor comprising a first current electrode coupled to a first voltage reference, a second current electrode coupled to the second electrode of the first capacitor, and a control electrode;
a second capacitor comprising a first electrode coupled to the control electrode of the first transistor and a second electrode, the second capacitor having a capacitive value;
a first resistive element comprising a first electrode coupled to the first voltage reference and a second electrode coupled to the control electrode of the first transistor, the first resistive element having a first resistive value; and
a second resistive element comprising a first electrode coupled to the control electrode of the first transistor and a second electrode coupled to a second voltage reference, the second resistive element having a second resistive value, the capacitive value, first resistive value, and second resistive value such that the first transistor is placed in cutoff mode during the first interval and in a saturation mode during the second interval.
2. The device of claim 1 , further comprising a horizontal synchronization module comprising an input coupled to the first current electrode of the first transistor and an output configured to provide a horizontal synchronization signal based on the composite video signal.
3. The device of claim 2 , wherein the horizontal synchronization module comprises a second transistor comprising a first current electrode coupled to the first voltage reference, a second current electrode coupled to the second voltage reference, and a control electrode coupled to the first current electrode of the first transistor.
4. The device of claim 1 , further comprising:
a vertical synchronization module comprising an input coupled to the first current electrode of the first transistor and an output configured to provide a vertical synchronization signal based on the composite video signal.
5. The device of claim 4 , wherein the vertical synchronization module comprises:
a buffer comprising an input coupled to the first current electrode of the first transistor and an output;
a filter comprising an input coupled to the output of the buffer and an output; and
an inverter comprising an input coupled to the output of the filter and an output configured to provide the vertical synchronization signal.
6. The device of claim 5 , wherein the buffer comprises a second transistor comprising a first current electrode coupled to the first voltage reference, a second current electrode coupled to the second voltage reference, and a control electrode coupled to the first current electrode of the first transistor.
7. The device of claim 5 wherein the filter comprises:
a third capacitor comprising a first electrode coupled to the output of the buffer and a second electrode coupled to the second voltage reference;
a third resistive element comprising a first electrode coupled to the first electrode of the third capacitor and a second electrode; and
a fourth capacitor comprising a first electrode coupled to the second electrode of the third resistive element and a second electrode coupled to the second voltage reference.
8. The device of claim 1 , wherein a charge stored by the second capacitor represents an average voltage level of the composite video signal.
9. The device of claim 1 , further comprising:
a filter coupled between the input node and the first electrode of the first capacitor.
10. The device of claim 1 , further comprising:
a third resistive element coupled between the first voltage reference and the first current electrode of the first transistor.
11. The device of claim 1 , further comprising:
a third resistive element coupled between the second current electrode of the first transistor and the second voltage reference.
12. The device of claim 11 , wherein the third resistive element is a resistor.
13. The device of claim 11 , wherein the third resistive element is an inductor.
14. The device of claim 1 , wherein the second electrode of the second capacitor is coupled to the second voltage reference.
15. A method, comprising:
receiving a video signal at an input;
during a first interval, maintaining a base-emitter voltage between a control node of a transistor and a current electrode of the transistor at a first state relative to a threshold in response to the composite video signal providing active video information;
during a second interval, changing the base-emitter voltage between the control node of a transistor and the current electrode of the transistor to a second state relative to the threshold in response to the video signal providing synchronization information; and
providing a first representation of a synchronization signal during the second interval.
16. The method of claim 15 , further comprising providing a horizontal synchronization signal based on the first representation of a synchronization signal.
17. The method of claim 15 , wherein the first interval corresponds to a cut-off state of the transistor.
18. The method of claim 17 , wherein the second interval corresponds to a saturation state of the transistor.
19. The method of claim 15 , wherein the threshold level is based on a detected moving average of the video signal.
20. The method of claim 15 , wherein the video signal is a composite video signal.