IP Library Granted Patent US 7,736,996
Granted Patent B2
US 7,736,996 · App. 11/554,847 · Granted Jun 15, 2010

Method for damage avoidance in transferring an ultra-thin layer of crystalline material with high crystalline quality

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,736,996
App. No.
11/554,847
Granted
Jun 15, 2010
Kind
B2
Abstract

A method for damage avoidance in transferring a monocrystalline, thin layer from a first substrate onto a second substrate involves epitaxial growth of a sandwich structure with a strained epitaxial layer buried below a monocrystalline thin layer, and lift-off and transfer of the monocrystalline thin layer with the cleaving controlled to happen within the buried strained layer in conjunction with the introduction of hydrogen.

Claims (16)

1. A method for transferring of a thin semiconductor layer with damage avoidance comprising:

forming a first heterostructure by depositing a non-graded layer of a material of the formula Si 1−x Ge x on a first substrate and thereafter depositing a monocrystalline epitaxial semiconductor layer on the Si 1−x Ge x layer, wherein 0<x<1;

introducing hydrogen atoms into the first heterostructure and allowing the hydrogen atoms to diffuse into the non-graded layer of Si 1−x Ge x of the first heterostructure, wherein at least one of the introducing and allowing is carried out in conjunction with at least one damage avoidance measure, wherein the at least one damage avoidance measure comprises using a heated catalyst to crack hydrogen (H 2 ), with zero bias or minimal bias to the first heterostructure, and one of poisoning and treating surfaces of a chamber for use in implementing the hydrogenation to minimize H recombination on the surfaces;

bonding the semiconductor layer of the first heterostructure to a second substrate to form a second heterostructure; and

splitting the second heterostructure at said Si 1−x Ge x layer, thereby transferring the semiconductor layer from the first heterostructure to the second substrate, wherein the semiconductor layer comprises a substantially defect free semiconductor layer in response to the at least one damage avoidance measure.

2. The method of claim 1 , further wherein the substantially defect free semiconductor layer is suitable for use in a fully depleted CMOS device application.

3. The method of claim 1 , wherein the at least one damage avoidance measure further comprises using remote plasma hydrogenation.

4. The method of claim 3 , further wherein using the remote plasma hydrogenation comprises using remote glow-discharge plasma.

5. The method of claim 1 , wherein the at least one damage avoidance measure further comprises using a sacrificial layer overlying the first heterostructure, the sacrificial layer being configured to at least achieve one of minimize and eliminate hydrogenation damage in the semiconductor layer yet to be formed, the method further comprising stripping the sacrificial layer subsequent to the hydrogenating and prior to the bonding of the first heterostructure with a second heterostructure.

6. The method of claim 5 , wherein the sacrificial layer comprises oxide.

7. The method of claim 5 , wherein the sacrificial layer comprises one selected from the group consisting of oxide, nitride, photoresist, and combinations thereof.

8. The method of claim 1 , wherein the at least one damage avoidance measure further comprises using a hydrogen (H 2 ) anneal, in place of a plasma H anneal, to minimize plasma damage to the semiconductor layer of the first heterostructure.

9. The method of claim 1 , wherein the at least one damage avoidance measure further comprises using a high keV implant to place the H substantially below the non-graded layer, and following the implant with an anneal to diffuse the H to the non-graded layer, wherein the non-graded layer comprises at least one of a strained-layer and a doped-layer, the non-graded layer further corresponding to a cleavage-layer.

10. The method of claim 1 , wherein the at least one damage avoidance measure further comprises using a remote glow-discharge plasma in a heated chamber for repairing damage as it may be created.

11. The method of claim 10 , wherein using the remote glow-discharge plasma further includes using the remote glow-discharge plasma in the heated chamber with a H 2 anneal for repairing damage as it may be created.

12. The method of claim 11 , wherein using the remote glow-discharge plasma still further includes using one selected from the group consisting of a heated wafer chuck and surface heating of the first heterostructure.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2007
From: THEODORE, NIRMAL DAVID; FREEMAN, JOHN L., JR.; TRACY, CLARENCE J.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 018958/0062 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
Reel/Frame 018855/0129 →