Integrated circuit chip assembly having array of thermally conductive features arranged in aperture of circuit substrate
View Patent ↗An assembly comprises a stiffener, a circuit substrate and an IC chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers at least a portion of the first region of the stiffener, while the IC chip overlies at least a portion of each of the first and second regions of the stiffener. The assembly further comprises a signal solder bump and a thermally conductive feature. The signal solder bump contacts the IC chip and the circuit substrate. The thermally conductive feature is disposed between, and is metallurgically bonded to, the integrated circuit chip and the second region of the stiffener. The thermally conductive feature provides an efficient thermal conductivity pathway between the IC chip and the stiffener.
1. An assembly comprising:
a stiffener, the stiffener having a surface comprising a first region and a second region;
a circuit substrate, the circuit substrate covering at least a portion of the first region of the stiffener;
an integrated circuit chip, the integrated circuit chip overlying at least a portion of each of the first and second regions of the stiffener;
a plurality of signal solder bumps, each of the plurality of signal solder bumps contacting the integrated circuit chip and the circuit substrate; and
a plurality of thermally conductive features, each of the plurality of thermally conductive features being disposed between, and being metallurgically bonded to, the integrated circuit chip and the second region of the stiffener;
wherein the circuit substrate has an aperture formed therethrough over the second region; and
wherein the thermally conductive features are arranged within the aperture in the form of an array of thermally conductive features.
2. The assembly of claim 1 , wherein the plurality of signal solder bumps is operative to conduct electrical signals between the integrated circuit chip and the circuit substrate.
3. The assembly of claim 1 , wherein at least one or more thermally conductive features comprises a layer of metallic material operative to conduct heat from the integrated circuit chip to the stiffener.
4. The assembly of claim 1 , wherein at least one of the plurality of thermally conductive features comprises a thermal solder bump operative to conduct heat from the integrated circuit chip to the stiffener.
5. The assembly of claim 4 , wherein the thermal solder bump is substantially larger than at least one of the plurality of signal solder bumps.
6. The assembly of claim 4 , wherein the thermal solder bump is substantially the same size as at least one of the plurality of signal solder bumps.
7. The assembly of claim 1 , wherein the first region of the stiffener is not coplanar with the second region of the stiffener.
8. The assembly of claim 1 , wherein a portion of the stiffener protrudes into an aperture defined by the circuit substrate.
9. The assembly of claim 1 , wherein the first region of the stiffener substantially surrounds a periphery of the second region of the stiffener.
10. The assembly of claim 1 , wherein the circuit substrate comprises a plurality of conductive traces, each of the plurality of conductive traces electrically coupled to respective ones of the plurality of signal solder bumps.
11. The assembly of claim 1 , further comprising an underfill, the underfill filling at least a portion of a space between the integrated circuit chip and the circuit substrate.
12. The assembly of claim 1 , wherein at least one of the plurality of thermally conductive features comprises a material having a thermal conductivity greater than about 10 Watts per meter-Kelvin (W/(m-K)).
13. An apparatus including:
an assembly, the assembly comprising:
a stiffener, the stiffener having a surface comprising a first region and a second region;
a circuit substrate, the circuit substrate covering at least a portion of the first region of the stiffener;
an integrated circuit chip, the integrated circuit chip overlying at least a portion of each of the first and second regions of the stiffener;
a plurality of signal solder bumps, each of the plurality of signal solder bumps contacting the integrated circuit chip and the circuit substrate;
a plurality of thermally conductive features, each of the plurality of thermally conductive features being disposed between, and being metallurgically bonded to, the integrated circuit chip and the second region of the stiffener; and
a support structure, the support structure attached to the stiffener and operative to dissipate heat generated by the integrated circuit chip;
wherein the circuit substrate has an aperture formed therethrough over the second region; and
wherein the thermally conductive features are arranged within the aperture in the form of an array of thermally conductive features.
14. The assembly of claim 1 , wherein the circuit substrate is substantially flexible.
15. The assembly of claim 1 , wherein the circuit substrate is substantially rigid.
16. A method of forming an assembly, the method comprising the steps of:
forming a stiffener, the stiffener having a surface comprising a first region and a second region;
forming a circuit substrate, the circuit substrate covering at least a portion of the first region of the stiffener;
forming an integrated circuit chip, the integrated circuit chip overlying at least a portion of each of the first and second regions of the stiffener;
forming a plurality of signal solder bumps, each of the plurality of signal solder bumps contacting the integrated circuit chip and the circuit substrate; and
forming a plurality of thermally conductive features, each of the plurality of thermally conductive features being disposed between, and being metallurgically bonded to, the integrated circuit chip and the second region of the stiffener;
wherein the circuit substrate has an aperture formed therethrough over the second region; and
wherein the thermally conductive features are arranged within the aperture in the form of an array of thermally conductive features.
17. The method of claim 16 , wherein the thermally conductive features are bonded to the integrated circuit chip before they are bonded to the stiffener.
18. The method of claim 16 , wherein the thermally conductive features are bonded to the stiffener before they are bonded to the integrated circuit chip.
19. The assembly of claim 1 , wherein the stiffener comprises aluminum, copper, gold, silver or iron, or a combination thereof.
20. The assembly of claim 1 , wherein the stiffener comprises a layer formed of nickel or tin, or a combination thereof.