IP Library Granted Patent US 7,595,236
Granted Patent B2
US 7,595,236 · App. 11/564,613 · Granted Sep 29, 2009

Method for production of semiconductor device having a hole extending through a first insulating film, a second insulating film and a third insulating film

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Quick Facts
Patent No.
US 7,595,236
App. No.
11/564,613
Granted
Sep 29, 2009
Kind
B2
Abstract

A short circuit with an adjacent hole is prevented. By enlarging a hole diameter in the lower part of the hole, a stable storage node is formed without causing a decrease in capacitance. Provided is a method for production of a semiconductor device, comprising the steps of: forming the second hole in the second insulating film to a depth at which a bowing shape does not occur by carrying out anisotropic etching; forming the fourth film on the side surfaces of the first and the second holes; forming the second hole of an aspect ratio greater than 12 by extending the second hole until the first insulating film is exposed by carrying out anisotropic etching; and extending by isotropic etching a side surface portion of the second hole on which the fourth film is not formed.

Claims (15)

1. A method for production of a semiconductor device having a first insulating film, a second insulating film as an interlayer insulating film and a third insulating film on a substrate in this order and having a hole extending through the first insulating film, the second insulating film and the third insulating film, the method comprising:

depositing the first insulating film, the second insulating film and the third insulating film on the substrate in this order;

forming a first hole extending through the third insulating film along a direction of the thickness thereof;

forming a second hole in the second insulating film in the lower part of the first hole to a depth at which a bowing shape does not occur by anisotropic etching using the third insulating film as a mask;

forming a fourth film on the side surfaces of the first and the second holes;

forming a third hole of an aspect ratio greater than twelve by extending the second hole until the first insulating film is exposed by carrying out anisotropic etching using the third insulating film and the fourth film as a mask and using the first insulating film as an etching stopper;

removing the first insulating film exposed in the lower part of the third hole by anisotropic etching; and

extending a side surface portion of the third hole, on which the fourth film is not formed, by isotropic etching using the third insulating film and the fourth film as a mask.

2. The method for production of a semiconductor device according to claim 1 , wherein the first insulating film is a silicon nitride film, the second insulating film is a silicon oxide film, the third insulating film is a non-doped polysilicon film and the fourth film is a polysilicon film.

3. The method for production of a semiconductor device according to claim 2 , wherein the polysilicon film constituting the fourth film is a conductive polysilicon film containing an impurity.

4. The method for production of a semiconductor device according to claim 1 , wherein the depth at which the bowing shape does not occur is a depth at which the aspect ratio of the second hole is seven or more and twelve or less.

5. The method for production of a semiconductor device according to claim 1 , wherein the isotropic etching is wet etching.

6. The method for production of a semiconductor device according to claim 1 , wherein the fourth insulating film is layered on the third insulating film, the third insulating film is layered on the second insulating film, and the second insulating film is layered on the first insulating film.

7. The method for production of a semiconductor device according to claim 1 , further comprising forming a contact plug extending through the substrate and contacting the first insulating layer.

8. The method for production of a semiconductor device according to claim 1 , wherein the first insulating film is a stopper layer, and the third insulating film is a hard mask layer.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: ELPIDA MEMORY, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032645/0422 →