Semiconductor device, semiconductor package for use therein, and manufacturing method thereof
View Patent ↗A semiconductor package includes a substrate for mounting and fixing a semiconductor chip thereon and a connecting pattern. The substrate is provided with an elongate opening formed therein. The semiconductor chip is fixed with its surface being mounted on the substrate and with its electrode being aligned within the elongate opening. The electrode of the semiconductor chip is electrically connected to the connecting pattern via wires through the elongate opening. The elongate opening and the wires are sealed with resin.
1. A semiconductor device comprising:
a substrate having a first surface and a second surface opposed to the first surface, said substrate further having an elongate opening defined therethrough from the first surface to the second surface;
a plurality of connecting patterns located on the second surface of said substrate, each of said plurality of connecting patterns having a first end located at a peripheral area of the elongate opening;
a semiconductor chip having a surface which is mounted to the first surface of said substrate;
a plurality of electrodes located on the surface of said semiconductor chip and aligned with the elongate opening of said substrate;
a plurality of wires extending within the elongate opening of said substrate, first ends of said plurality of wires being respectively bonded to said plurality of electrodes, and second ends of said plurality of wires being respectively bonded to corresponding ones of the first ends of said plurality of connecting patterns;
a resist which covers said plurality of connecting patterns, wherein the first ends of said plurality of connecting patterns are exposed from said resist; and
a resin which covers said plurality of electrodes, said plurality of wires, and the first ends of said plurality of connecting patterns.
2. The semiconductor device of claim 1 , wherein said resist has an opening at which the first ends of said plurality of connecting patterns are located.
3. The semiconductor device of claim 1 , further comprising a plurality of external connecting terminals respectively bonded to second ends of said plurality of connecting patterns through said resist.
4. The semiconductor device of claim 3 , wherein said resist has openings at which the second ends of said plurality of connecting patterns are respectively located.
5. The semiconductor device of claim 3 , wherein the elongate opening is smaller than said semiconductor chip.
6. The semiconductor device of claim 3 , wherein said resin extends out of the elongate opening beyond a height of said plurality of connecting patterns at which said plurality of external connecting terminals are bonded.