IP Library Granted Patent US 7,468,317
Granted Patent B2
US 7,468,317 · App. 11/593,882 · Granted Dec 23, 2008

Method of forming metal line of semiconductor device

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Quick Facts
Patent No.
US 7,468,317
App. No.
11/593,882
Granted
Dec 23, 2008
Kind
B2
Abstract

A method of forming a metal line, in which a nitride layer is used instead of a metal barrier layer, enabling a metal line structure with a relatively low resistance and therefore realizing a high integration of a device. In the method of forming the metal line of the semiconductor device, a first insulating layer and a second insulating layer with a different etch selectivity are sequentially formed on a semiconductor substrate. Predetermined regions of the first insulating layer and the second insulating layer are sequentially etched to form a contact hole. A metal barrier layer is formed on the entire surface including the contact hole. A first metal material is deposited on the entire surface to gap-fill the contact hole. The first metal material on the second insulating layer is stripped such that the first metal material remains only within the contact hole, thus forming a contact plug. A metal line is formed on a predetermined region of the second insulating layer including the contact plug.

Claims (15)

1. A method of forming a metal line of a semiconductor device, the method comprising the steps of:

sequentially forming a first insulating layer and a second insulating layer with different etch selectivities on a semiconductor substrate;

sequentially etching predetermined regions of the first insulating layer and the second insulating layer to form a contact hole;

forming a metal barrier layer on the entire surface including the contact hole;

depositing a first metal material on the entire surface so that the contact hole is gap-filled;

stripping the first metal material on the second insulating layer so that the first metal material remains only within the contact hole, thus forming a contact plug; and

forming a metal line on a predetermined region of the second insulating layer including the contact plug.

2. The method of claim 1 , comprising, when the contact plug is formed, stripping the metal barrier layer on the second insulating layer.

3. The method of claim 2 , comprising when the metal barrier layer on the second insulating layer is stripped, partially stripping the second insulating layer.

4. The method of claim 3 , wherein a thickness of the second insulating layer, which remains after the second insulating layer is partially stripped, is within a range of 50 Å to 500 Å.

5. The method of claim 1 , comprising stripping the first metal material by a Chemical Mechanical Polishing (CMP) process or an etch-back process.

6. The method of claim 1 , wherein the first metal material is tungsten.

7. The method of claim 1 , comprising forming the metal line by a mask process and an etch process after forming a second metal material on the second insulating layer.

8. The method of claim 7 , wherein the second metal material is tungsten.

9. The method of claim 1 , wherein the first insulating layer is an oxidization layer, and the second insulating layer is a nitride layer.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2006
From: CHO, JIK HO; KIM, TAE KYUNG
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 018592/0447 →