IP Library Granted Patent US 7,795,115
Granted Patent B2
US 7,795,115 · App. 11/645,811 · Granted Sep 14, 2010

Method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,795,115
App. No.
11/645,811
Granted
Sep 14, 2010
Kind
B2
Abstract

The invention is directed to enhancement of reliability and a yield of a semiconductor device by a method of manufacturing the semiconductor device with a supporting body without making the process complex. A second insulation film, a semiconductor substrate, a first insulation film, and a passivation film are etched and removed in this order using a resist layer or a protection layer as a mask. By this etching, an adhesive layer is partially exposed in an opening. At this time, a number of semiconductor devices are separated in individual semiconductor dies. Then, as shown in FIG. 10 , a solvent (e.g. alcohol or acetone) is supplied to the exposed adhesive layer through the opening to gradually reduce its adhesion and thereby a supporting body is removed from the semiconductor substrate.

Claims (35)

1. A method of manufacturing a semiconductor device, comprising:

forming a groove in a semiconductor substrate from a front surface thereof;

attaching a supporting body to the front surface of the semiconductor substrate having the groove formed therein using an adhesive layer disposed between the supporting body and the front surface of the semiconductor substrate, the adhesive layer filling the groove in the semiconductor substrate at least partially;

forming an opening in the semiconductor substrate from a back surface thereof so that the opening is connected with the groove to expose a portion of the adhesive layer; and

separating the supporting body from the semiconductor substrate by supplying a solvent to the exposed portion of the adhesive layer so as to dissolve the adhesive layer.

2. The method of claim 1 , wherein the formation of an opening in the semiconductor is performed using a dicing blade, a laser or etching.

3. The method of claim 1 , further comprising grinding the back surface of the semiconductor substrate after the attaching of the supporting body.

4. The method of claim 1 , wherein the groove is formed along a dicing line of the semiconductor substrate.

5. The method of claim 1 , wherein the groove is not formed in a periphery portion of the semiconductor substrate.

6. A method of manufacturing a semiconductor device, comprising:

forming a groove in a semiconductor substrate from a front surface thereof;

forming an insulation film on the front surface of the semiconductor substrate and a pad electrode on the insulation film;

attaching a supporting body to the front surface of the semiconductor substrate having the groove, the insulation film and the pad electrode using an adhesive layer disposed between the supporting body and the front surface of the semiconductor substrate;

after the attaching of the supporting body, exposing the pad electrode by removing a portion of the semiconductor substrate and a portion of the insulation film from the back surface of the semiconductor substrate;

forming a wiring layer electrically connected with the exposed pad electrode;

forming a protection film on the back surface of the semiconductor substrate to cover the wiring layer;

forming an opening in the semiconductor substrate from a back surface thereof so that the opening is connected with the groove to expose a portion of the adhesive layer; and

separating the supporting body from the semiconductor substrate by supplying a solvent to the exposed portion of the adhesive layer so as to dissolve the adhesive layer.

7. The method of claim 6 , further comprising forming an electrode connection layer on the pad electrode prior to the attaching of the supporting body, the electrode connection layer being configured for electrical connection with an electrode of an external semiconductor device.

8. The method of claim 7 , wherein the electrode connection layer comprises nickel, gold, copper, tin or a combination thereof.

9. The method of claim 1 , further comprising, after the attaching of the supporting body, forming a via hole in the semiconductor substrate from the back surface of the semiconductor substrate, forming a wiring layer in the via hole so as to extend over the back surface of the semiconductor substrate, and forming a protection film on the back surface of the semiconductor substrate to cover the wiring layer.

10. The method of claim 1 , wherein the supporting body has no path for supplying the solvent.

11. The method of claim 1 , wherein the supporting body comprises a rigid substrate.

12. A method of manufacturing a semiconductor device, comprising:

forming a groove in a semiconductor substrate from a front surface thereof;

attaching a supporting body to the front surface of the semiconductor substrate having the groove formed therein using an adhesive layer disposed between the supporting body and the front surface of the semiconductor substrate, the adhesive layer filling the groove in the semiconductor substrate at least partially so as to be in direct contact with a sidewall of the groove;

thinning the semiconductor substrate by grinding a back surface of the semiconductor substrate so as to expose a portion of the adhesive layer; and

separating the supporting body from the semiconductor substrate by supplying a solvent to the exposed portion of the adhesive layer so as to dissolve the adhesive layer.

13. The method of claim 12 , wherein the groove is formed along a dicing line of the semiconductor substrate.

14. The method of claim 12 , wherein the groove is not formed in a periphery portion of the semiconductor substrate.

15. The method of claim 12 , further comprising, prior to the attaching of the supporting body, forming an insulation film on the front surface of the semiconductor substrate and a pad electrode on the insulation film, and further comprising, after the attaching of the supporting body, exposing the pad electrode by removing a portion of the semiconductor substrate and a portion of the insulation film from the back surface of the semiconductor substrate, forming a wiring layer electrically connected with the exposed pad electrode, and forming a protection film on the back surface of the semiconductor substrate to cover the wiring layer.

16. The method of claim 15 , further comprising forming an electrode connection layer on the pad electrode prior to the attaching of the supporting body, the electrode connection layer being configured for electrical connection with an electrode of an external semiconductor device.

17. The method of claim 16 , wherein the electrode connection layer comprises nickel, gold, copper, tin or a combination thereof.

18. The method of claim 12 , further comprising, after the attaching of the supporting body, forming a via hole in the semiconductor substrate from the back surface of the semiconductor substrate, forming a wiring layer in the via hole so as to extend over the back surface of the semiconductor substrate, and forming a protection film on the back surface of the semiconductor substrate to cover the wiring layer.

19. The method of claim 12 , wherein the supporting body comprises a rigid substrate.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2016
From: SYSTEM SOLUTIONS CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038994/0667 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2016
From: ON SEMICONDUCTOR NIIGATA CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038988/0804 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CHANGE OF NAME Recorded Feb 23, 2016
From: SANYO SEMICONDUCTOR MANUFACTURING CO., LTD.
To: ON SEMICONDUCTOR NIIGATA CO., LTD.
Reel/Frame 037893/0953 →
CHANGE OF NAME Recorded Feb 19, 2016
From: SANYO SEMICONDUCTOR CO., LTD.
To: SYSTEM SOLUTIONS CO., LTD.
Reel/Frame 037773/0090 →
CHANGE OF NAME Recorded Aug 10, 2015
From: NIGATA SANYO ELECTRIC CO., LTD.
To: SANYO SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 036318/0040 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →