Patent Assignment
Reel/Frame 038620/0087
SECURITY INTEREST
Recorded: 2016-04-15
Received: 2016-04-15
Pages: 348
Assignor
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Executed: 2016-04-15
Assignee
DEUTSCHE BANK AG NEW YORK BRANCH
60 WALL STREET, NEW YORK, NY, 10005, UNITED STATES
Covered Applications
(100)
AREA-FRIENDLY METHOD FOR PROVIDING DUTY CYCLE INVERSE TO SUPPLY VOLTAGE
App. No. 15/092,904
→
CONTROLLING AN OUTPUT SIGNAL INDEPENDENTLY OF THE FIRST HARMONIC
App. No. 15/092,982
→
WIRE BONDING SYSTEMS AND RELATED METHODS
App. No. 15/091,436
→
ULTRASONIC CONTROL SYSTEM AND METHOD FOR A BUCK-BOOST POWER CONVERTER
App. No. 15/084,345
→
METHOD TO IMPROVE ANALOG FAULT COVERAGE USING TEST DIODES
App. No. 15/073,009
→
TUNABLE RESONANT INDUCTIVE COIL SYSTEMS FOR WIRELESS POWER TRANSFER AND NEAR FIELD COMMUNICATIONS
App. No. 15/073,106
→
FUSE ELEMENT PROGRAMMING CIRCUIT AND METHOD
App. No. 15/073,121
→
SEMICONDUCTOR PACKAGES AND RELATED METHODS
App. No. 15/063,011
→
HYBRID CIRCUIT DEVICE
App. No. 15/054,233
→
IMAGE SENSOR WITH BURIED-CHANNEL DRAIN (BCD) TRANSISTORS
App. No. 15/052,574
→
METHOD OF FORMING A SEMICONDUCTOR DEVICE INCLUDING TRENCH TERMINATION
App. No. 15/047,874
→
OVER POWER PROTECTION FOR POWER CONVERTER
App. No. 15/042,357
→
SCHOTTKY DEVICE AND METHOD OF MANUFACTURE
App. No. 15/040,650
→
POWER CONVERTER WITH HYSTERETIC BUCK-BOOST ARCHITECTURE AND METHOD THEREFOR
App. No. 15/019,288
→
SEMICONDUCTOR DEVICE HAVING LOCALIZED CHARGE BALANCE STRUCTURE AND METHOD
App. No. 15/009,380
→
METHOD OF MANUFACTURING A CIRCUIT DEVICE
App. No. 15/003,958
→
IMAGING SYSTEMS WITH BACKSIDE ISOLATION TRENCHES
App. No. 14/994,534
→
INSULATED GATE SEMICONDUCTOR DEVICE HAVING A SHIELD ELECTRODE STRUCTURE AND METHOD
App. No. 14/992,106
→
METHOD OF FORMING A HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
App. No. 14/989,370
→
SEMICONDUCTOR LEADFRAMES AND PACKAGES WITH SOLDER DAMS AND RELATED METHODS
App. No. 14/983,863
→
METHOD OF FORMING A SEMICONDUCTOR DEVICE
App. No. 14/971,732
→
TRIMMING METHOD FOR CURRENT SENSE AMPLIFIERS
App. No. 14/967,529
→
SEMICONDUCTOR WAFER INCLUDING A MONOCRYSTALLINE SEMICONDUCTOR LAYER SPACED APART FROM A POLY TEMPLATE LAYER
App. No. 14/966,649
→
IMAGERS WITH DEPTH SENSING CAPABILITIES
App. No. 14/966,045
→
CONTROL CIRCUIT AND METHOD
App. No. 14/951,744
→
ELECTRONIC DEVICE INCLUDING A DIODE
App. No. 14/945,735
→
SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
App. No. 14/939,873
→
DIGITAL-TO-ANALOG CONVERTER
App. No. 14/937,175
→
TEMPERATURE STABLE REFERENCE CURRENT
App. No. 14/936,927
→
SEMICONDUCTOR DEVICE HAVING LOCALIZED CHARGE BALANCE STRUCTURE AND METHOD
App. No. 14/930,060
→
TRANSDUCER CONTROLLER AND METHOD THEREFOR
App. No. 14/919,030
→
METHOD OF FORMING A SEMICONDUCTOR DIE CUTTING TOOL
App. No. 14/885,804
→
DETECTING TRANSIENT SIGNALS USING STACKED-CHIP IMAGING SYSTEMS
App. No. 14/881,452
→
PIXELS WITH A GLOBAL SHUTTER AND HIGH DYNAMIC RANGE
App. No. 14/877,722
→
MOTOR CONTROLLER WITH FLEXIBLE PROTECTION MODES
App. No. 14/875,884
→
EFFICIENT MULTI-MODE DC-DC CONVERTER
App. No. 14/873,406
→
IMAGING SYSTEMS WITH CLEAR FILTER PIXELS
App. No. 14/871,520
→
PIXELS WITH MULTIPLE CHARGE STORAGE REGIONS
App. No. 14/870,522
→
IMAGING SYSTEMS WITH FLICKER MITIGATION AND HIGH DYNAMIC RANGE
App. No. 14/870,578
→
PLASMA ETCH SINGULATED SEMICONDUCTOR PACKAGES AND RELATED METHODS
App. No. 14/870,440
→
METHOD FOR FORMING A SEMICONDUCTOR IMAGE SENSOR DEVICE
App. No. 14/869,490
→
SEMICONDUCTOR STRUCTURE INCLUDING A DOPED BUFFER LAYER AND A CHANNEL LAYER AND A PROCESS OF FORMING THE SAME
App. No. 14/867,131
→
CALIBRATION FOR SPREAD SPECTRUM CLOCK GENERATOR AND METHOD THEREFOR
App. No. 14/864,135
→
SPREAD SPECTRUM CLOCK GENERATOR AND METHOD THEREFOR
App. No. 14/864,060
→
PIXELS WITH AN ACTIVE RESET CIRCUIT IN CMOS IMAGE SENSORS
App. No. 14/862,830
→
HIGH DYNAMIC RANGE AND GLOBAL SHUTTER IMAGE SENSOR PIXELS HAVING CHARGE OVERFLOW SIGNAL DETECTING STRUCTURES
App. No. 14/862,859
→
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
App. No. 14/856,070
→
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREFOR
App. No. 14/856,040
→
ELECTROSTATIC DISCHARGE (ESD) ROBUST TRANSISTORS AND RELATED METHODS
App. No. 14/852,912
→
TRIGGERED-EVENT SIGNALING WITH DIGITAL ERROR REPORTING
App. No. 14/853,307
→
HETEROJUNCTION SEMICONDUCTOR DEVICE HAVING INTEGRATED CLAMPING DEVICE
App. No. 14/853,720
→
CASCODE SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR
App. No. 14/853,729
→
HIGH EFFICIENCY IMAGE SENSOR PIXELS WITH DEEP TRENCH ISOLATION STRUCTURES AND EMBEDDED REFLECTORS
App. No. 14/852,194
→
ELECTRICAL SAFETY DEVICE MISWIRE DETECTION
App. No. 14/850,271
→
METHOD OF FORMING A SEMICONDUCTOR DIE
App. No. 14/849,779
→
POWER-DOWN DISCHARGER
App. No. 14/844,927
→
RESIN SEALING TYPE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME, AND LEAD FRAME
App. No. 14/844,427
→
FIELD-EFFECT TRANSISTOR WITH INTEGRATED SCHOTTKY CONTACT
App. No. 14/843,852
→
TUNABLE/DE-TUNABLE WIRELESS POWER RESONATOR SYSTEM AND RELATED METHODS
App. No. 14/843,819
→
SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME
App. No. 14/842,571
→
CIRCUIT INCLUDING A RECTIFYING ELEMENT
App. No. 14/841,530
→
SENSOR-LESS CIRCUIT AND METHOD FOR DETECTING A ROTOR POSITION
App. No. 14/838,834
→
SENSOR-LESS CIRCUIT AND METHOD FOR DETECTING A ROTOR POSITION
App. No. 14/838,782
→
AUTOMATIC ZEROING AND DETECTION CIRCUIT AND METHOD
App. No. 14/838,897
→
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A DRIFT REGION, A SINKER REGION, AND A RESURF REGION
App. No. 14/837,228
→
BACK-SIDE ILLUMINATED PIXELS WITH INTERCONNECT LAYERS
App. No. 14/836,599
→
BULK CURRENT REGULATION LOOP
App. No. 14/833,229
→
SYSTEMS AND METHODS FOR WEIGHTED IMAGE SIGNAL READOUT
App. No. 14/831,437
→
SEMICONDUCTOR DIE BACK LAYER SEPARATION METHOD
App. No. 14/827,110
→
INTEGRATED CIRCUIT CONTROL OF ANTI-SERIES SWITCHES
App. No. 14/820,597
→
SUBSTRATE STRUCTURES AND METHODS OF MANUFACTURE
App. No. 14/816,520
→
BATTERY SYSTEM RESET SYSTEMS AND RELATED METHODS
App. No. 14/814,662
→
BATTERY PROTECTION SYSTEM WITH REFERENCE VOLTAGE CONTROL SYSTEM
App. No. 14/814,305
→
AUTOMATICALLY PROGRAMMABLE BATTERY PROTECTION SYSTEM AND RELATED METHODS
App. No. 14/813,314
→
HIGH ELECTRON MOBILITY SEMICONDUCTOR DEVICE AND METHOD THEREFOR
App. No. 14/814,106
→
SEMICONDUCTOR DEVICES AND METHODS OF MAKING THE SAME
App. No. 14/812,200
→
DIE BONDING TO A BOARD
App. No. 14/812,846
→
FLIP CHIP BONDING ALLOYS
App. No. 14/812,861
→
AUTOMATICALLY PROGRAMMABLE BATTERY PROTECTION SYSTEM AND RELATED METHODS
App. No. 14/811,973
→
PROGRAMMABLE BATTERY PROTECTION SYSTEM AND RELATED METHODS
App. No. 14/809,425
→
SEMICONDUCTOR DEVICES HAVING SUPER-JUNCTION TRENCHES WITH CONDUCTIVE REGIONS AND METHOD OF MAKING THE SAME
App. No. 14/809,749
→
INDUCTIVE-ENERGY-BASED AUTO-TUNING DC-TO-DC CONTROLLER
App. No. 14/808,708
→
METHOD OF SINGULATING SEMICONDUCTOR WAFER HAVING BACK LAYER
App. No. 14/808,729
→
Circuit And An Integrated Circuit Including A Transistor And Another Component Coupled Thereto
App. No. 14/808,627
→
HIGH DYNAMIC RANGE IMAGING PIXELS WITH LOGARITHMIC RESPONSE
App. No. 14/806,249
→
OPTICAL TOUCH SCREEN SYSTEM USING RADIATION PATTERN SENSING AND METHOD THEREFOR
App. No. 14/806,388
→
SEMICONDUCTOR DIODE AND METHOD OF MANUFACTURE
App. No. 14/803,365
→
METHOD OF FORMING A SEQUENCING SYSTEM AND STRUCTURE THEREFOR
App. No. 14/804,166
→
RECESSED LEAD LEADFRAME PACKAGES
App. No. 14/800,881
→
METHODS FOR CLOCKING AN IMAGE SENSOR
App. No. 14/796,581
→
IMAGE SENSOR WITH DUAL LAYER PHOTODIODE STRUCTURE
App. No. 14/793,480
→
CONVERTER WITH PULSE WIDTH MODULATION AND PULSE FREQUENCY MODULATION OPERATING MODES
App. No. 14/791,491
→
IMAGE SENSORS WITH BACKSIDE TRENCH STRUCTURES
App. No. 14/788,168
→
IMAGE SENSOR PIXELS WITH CONDUCTIVE BIAS GRIDS
App. No. 14/755,745
→
DRIVE CIRCUIT AND METHOD
App. No. 14/751,370
→
IMAGE SENSOR WITH HIGH DYNAMIC RANGE AND METHOD
App. No. 14/748,513
→
IMAGE SENSORS WITH VOLTAGE-BIASED TRENCH ISOLATION STRUCTURES
App. No. 14/747,021
→
CASCODE SEMICONDUCTOR PACKAGE AND RELATED METHODS
App. No. 14/744,743
→
ELECTRONIC DEVICE INCLUDING A CHANNEL LAYER INCLUDING GALLIUM NITRIDE
App. No. 14/741,567
→
PASSIVE TUNABLE INTEGRATED CIRCUIT (PTIC) AND RELATED METHODS
App. No. 14/742,301
→