IP Library Granted Patent US 10,727,170
Granted Patent B2
US 10,727,170 · App. 14/842,571 · Granted Jul 28, 2020

Semiconductor devices and methods of making the same

Inventors: Swee Har Khor (Kuala Lumpur, MY); Tian Hing Lim (Selangor, MY); Hui Min Ler (Seremban, MY); Chee Hiong Chew (Seremban, MY); Phillip Celaya (Gilbert, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/49513H01L23/49524H01L23/60H01L24/83H01L24/92H01L24/97H01L25/0655H01L25/072H01L25/50H01L21/4828H01L23/3121H01L23/49548H01L23/49562H01L23/49575H01L24/27H01L24/29H01L24/32H01L24/33H01L24/40H01L24/48H01L24/84H01L2224/04026H01L2224/04034H01L2224/04042H01L2224/26175H01L2224/2731H01L2224/2732H01L2224/27312H01L2224/27334H01L2224/291H01L2224/2919H01L2224/29078H01L2224/29191H01L2224/29294H01L2224/32225H01L2224/32245H01L2224/33181H01L2224/40227H01L2224/40247H01L2224/40499H01L2224/48227H01L2224/48247H01L2224/73263H01L2224/73265H01L2224/83002H01L2224/83191H01L2224/83192H01L2224/83815H01L2224/83855H01L2224/84815H01L2224/84855H01L2224/9221H01L2224/92157H01L2224/92247H01L2224/97H01L2924/00014H01L2924/13091
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Quick Facts
Patent No.
US 10,727,170
App. No.
14/842,571
Granted
Jul 28, 2020
Kind
B2
Abstract

In one embodiment, methods for making semiconductor devices are disclosed.

Claims (26)

1. A semiconductor device comprising:

a lead frame;

a non-conductive barrier material disposed on a portion of a first side of the lead frame;

a die attachment material disposed on a portion of the first side of the lead frame, wherein the die attachment material is conductive, and wherein the non-conductive barrier material is disposed between a first region of the first side of the lead frame having at least a portion of the die attachment material and a second region of the first side of the substrate that does not have the die attachment material; and

a semiconductor die disposed on the die attachment material such that the semiconductor die is attached to at least the first region of the first side of the lead frame, wherein the die attachment material electrically couples a contact pad of the semiconductor die to the lead frame, wherein a footprint of the semiconductor die is larger than a footprint of the non-conductive barrier material, and wherein the non-conductive barrier material is configured to impede movement of the die attachment material away from the footprint of the semiconductor die.

2. The semiconductor device of claim 1 , wherein at least a portion of the non-conductive barrier material is disposed between the lead frame and the semiconductor die.

3. The semiconductor device of claim 1 , wherein the non-conductive barrier material is an organic material.

4. The semiconductor device of claim 1 , wherein the die attachment material is an epoxy, a polyimide, a silicone, an organic adhesive, or a solder.

5. The semiconductor device of claim 1 , wherein the semiconductor die comprises a contact pad that is electrically coupled to the first region of the first side of the lead frame.

6. The semiconductor device of claim 1 , wherein the semiconductor device further comprises a molding material encapsulating at least a portion of the semiconductor die and at least a portion of the lead frame.

7. The semiconductor device of claim 1 , wherein the non-conductive barrier material has a width of about 50 μm to about 400 μm.

8. The semiconductor device of claim 7 , wherein the non-conductive barrier material has a thickness of about 10 μm to about 127 μm.

9. The semiconductor device of claim 1 , wherein the non-conductive barrier material forms two or more interconnected lines.

10. The semiconductor device of claim 1 , wherein the non-conductive barrier material partially surrounds the first region of the first side of the lead frame.

11. The semiconductor device of claim 1 , wherein the non-conductive barrier material forms an enclosed shape that surrounds the first region of the first side of the lead frame.

12. The semiconductor device of claim 1 , wherein the non-conductive barrier material is laterally spaced apart from the footprint of the semiconductor die.

13. A lead frame comprising:

a conductive substrate having an exposed mounting region configured to attach a semiconductor die, wherein the mounting region is configured to be electrically coupled to a contact pad of the semiconductor die when the semiconductor die is attached to the mounting region; and

a non-conductive barrier material disposed on the conductive substrate, wherein the non-conductive barrier material is adjacent to the mounting region, wherein the non-conductive barrier material has a width of about 50 μm to about 400 μm, wherein a footprint of the exposed mounting region is larger than a footprint of the non-conductive barrier material, and wherein the non-conductive barrier material is configured to impede movement of a die attachment material away from a footprint of the semiconductor die during attachment of the semiconductor die to the conductive substrate.

14. The lead frame of claim 13 , wherein the lead frame further comprises a die attachment material disposed on the mounting region of the conductive substrate.

15. The lead frame of claim 13 , wherein the non-conductive barrier material is a gel, a wet film, a dry film, or an adhesive.

16. The lead frame of claim 13 , wherein the non-conductive barrier material has an enclosed shape that surrounds the mounting region.

17. The lead frame of claim 13 , wherein the non-conductive barrier material has a thickness of about 10 μm to about 127 μm.

18. The lead frame of claim 13 , wherein the non-conductive barrier material forms two or more interconnected lines.

19. The lead frame of claim 13 , wherein the non-conductive barrier material partially surrounds the mounting region.

20. An array of interconnected lead frames, wherein the array comprises the lead fame of claim 13 , and wherein each lead frame is the same.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2015
From: LIM, TIAN HING; LER, HUI MIN; CHEW, CHEE HIONG; KHOR, SWEE HAR; CELAYA, PHILLIP
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 036471/0165 →
Continuity (1)
Related Publication 20170062310A1 · Mar 2, 2017