IP Library Granted Patent US 9,853,080
Granted Patent B2
US 9,853,080 · App. 14/870,522 · Granted Dec 26, 2017

Pixels with multiple charge storage regions

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Quick Facts
Patent No.
US 9,853,080
App. No.
14/870,522
Granted
Dec 26, 2017
Kind
B2
Abstract

An imaging pixel may be provided with a photodiode and a floating diffusion region. The pixel may include multiple charge storage regions interposed between the photodiode and the floating diffusion region. A first charge storage region may be used to store charge from the photodiode for global shutter functionality. A second charge storage region may not be coupled to the photodiode. The second charge storage region may be used to determine how much charge is generated in the charge storage region from incident light on the charge storage region. The second charge storage region may help account for incident light noise in the first charge storage region. The second charge storage region may be the same size as the first charge storage region, or may be smaller than the first charge storage region.

Claims (39)

1. An imaging pixel comprising:

a floating diffusion region;

a photodiode;

a first charge storage region that is coupled to the floating diffusion region and the photodiode; and

a second charge storage region that is coupled to the floating diffusion region, wherein the second charge storage region is not coupled to the photodiode, wherein the first charge storage region has a first size and a first shape, wherein the second charge storage region has a second size and a second shape, wherein the first size is the same as the second size, and wherein the first shape is the same as the second shape.

2. The imaging pixel defined in claim 1 , further comprising:

a first transfer transistor interposed between the first charge storage region and the floating diffusion region.

3. The imaging pixel defined in claim 2 , further comprising:

a second transfer transistor interposed between the second charge storage region and the floating diffusion region.

4. The imaging pixel defined in claim 3 , further comprising:

a source follower transistor coupled to the floating diffusion region.

5. The imaging pixel defined in claim 3 , further comprising:

a third transfer transistor interposed between the first charge storage region and the photodiode.

6. The imaging pixel defined in claim 1 , wherein the first and second charge storage regions are interposed between the photodiode and the floating diffusion region, and wherein the first and second charge storage regions are adjacent.

7. The imaging pixel defined in claim 1 , wherein the first and second charge storage regions are storage gates.

8. The imaging pixel defined in claim 1 , wherein the first and second charge storage regions are storage diodes.

9. The imaging pixel defined in claim 1 , wherein the imaging pixel is a back-side illuminated pixel.

10. An image sensor comprising a plurality of imaging pixels, wherein each imaging pixel comprises:

a floating diffusion region

a photodiode

a first charge storage region that is interposed between the photodiode and the floating diffusion region, wherein the first charge storage region is coupled directly to the photodiode;

a second charge storage region that is interposed between the photodiode and the floating diffusion region, wherein the second charge storage region is not coupled directly to the photodiode;

a first transfer transistor interposed between the first charge storage region and the floating diffusion region, wherein the first transfer transistor is configured to transfer charge from the first charge storage region directly to the floating diffusion region without the charge reaching the second charge storage region; and

a second transfer transistor interposed between the second charge storage region and the floating diffusion region, wherein the second transfer transistor is configured to transfer charge from the second charge storage region directly to the floating diffusion region without the charge reaching the first charge storage region.

11. The image sensor defined in claim 10 , wherein the first charge storage region is coupled to the floating diffusion region and wherein the second charge storage region is coupled to the floating diffusion region.

12. The image sensor defined in claim 10 , wherein each imaging pixel further comprises:

a third transfer transistor interposed between the first charge storage region and the photodiode, wherein the third transfer transistor is configured to transfer charge from the photodiode to the first charge storage region.

13. The image sensor defined in claim 10 , wherein the first and second charge storage regions have the same size.

14. A method for operating an imaging pixel, wherein the imaging pixel comprises a floating diffusion region, a photodiode, a first charge storage region, and a second charge storage region, the method comprising:

collecting a first amount of charge in the photodiode;

transferring the first amount of charge from the photodiode to the first charge storage region;

transferring the first amount of charge from the first charge storage region to the floating diffusion region;

after transferring the first amount of charge from the first charge storage region to the floating diffusion region, sampling the first amount of charge at the floating diffusion region;

after sampling the first amount of charge at the floating diffusion region, resetting the floating diffusion region to a power supply voltage;

after resetting the floating diffusion region to the power supply voltage, transferring a second amount of charge from the second charge storage region to the floating diffusion region; and

after transferring the second amount of charge from the second charge storage region to the floating diffusion region, sampling the second amount of charge at the floating diffusion region.

15. The method defined in claim 14 , further comprising:

before transferring the first amount of charge from the first charge storage region to the floating diffusion region, resetting the floating diffusion region to the power supply voltage and sampling a third amount of charge at the floating diffusion region; and

after resetting the floating diffusion region to the power supply voltage and before transferring the second amount of charge from the second charge storage region to the floating diffusion region, sampling a fourth amount of charge at the floating diffusion region.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2015
From: GEURTS, TOMAS
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 036692/0324 →