High efficiency image sensor pixels with deep trench isolation structures and embedded reflectors
An image sensor with an array of pixels is provided. To minimize optical and electrical and crosstalk, the array of pixels may include deep trench isolation structures interposed between adjacent pairs of photodiodes. In order to maximize quantum efficiency, the array of pixels may include a reflective stack formed under the photodiodes and the deep trench isolation structures. The deep trench isolation structures may be formed from doped glass, doped polysilicon, or metal having a doped oxide liner. The reflective stack may include multiple layers of materials having different indices of refraction. The reflective stack may include oxide, nitride, and semiconductor layers. The deep trench isolation structures may extend from the top of the photodiodes down to the reflective stack. The deep trench isolation structures may have a 50 to 1 aspect ratio.
1. An array of front side illuminated image sensor pixels, comprising:
first and second photosensitive elements formed in a semiconductor substrate of the front side illuminated image sensor pixels;
a deep isolation region formed between the first and second photosensitive elements; and
a reflective layer formed under the first photosensitive element, the second photosensitive element, and the deep isolation region, wherein the reflective layer comprises:
a first oxide layer;
a first silicon layer formed under the first oxide layer;
a nitride layer formed under the first oxide layer;
a second oxide layer formed under the nitride layer; and
a second silicon layer formed under the nitride layer.
2. The array of front side illuminated image sensor pixels defined in claim 1 wherein the deep isolation region comprises a deep trench isolation structure, the array of front side illuminated image sensor pixels further comprising:
passivation layers formed between the deep isolation region and the first and second photosensitive elements; and
an oxide layer formed over the semiconductor substrate.
3. The array of front side illuminated image sensor pixels defined in claim 2 , further comprising:
a first p+ doped layer interposed between the reflective layer and the first photosensitive element;
a second p+ doped layer interposed between the reflective layer and the second photosensitive element.
4. The array of front side illuminated image sensor pixels defined in claim 3 , wherein the deep trench isolation structure comprises:
a trench filled with doped polysilicon.
5. The array of front side illuminated image sensor pixels defined in claim 4 , wherein the deep trench isolation structure further comprises:
a doped oxide liner, wherein the doped oxide liner is interposed between the doped polysilicon and the first photosensitive element and between the doped polysilicon and the second photosensitive element.
6. The array of front side illuminated image sensor pixels defined in claim 2 , wherein the deep trench isolation structure comprises:
a trench filled with metal; and
a doped oxide liner interposed between the metal and the first photosensitive element and between the metal and the second photosensitive element, wherein the metal receives a bias voltage.
7. The array of front side illuminated image sensor pixels defined in claim 2 , wherein the deep trench isolation structure comprises:
a trench filled with doped glass.
8. The array of front side illuminated image sensor pixels defined in claim 1 , wherein the deep isolation region comprises:
a deep diffusion isolation structure.
9. An image sensor having an array of pixels, comprising:
photodiodes formed in a semiconductor substrate;
deep trench isolation structures formed between adjacent pairs of the photodiodes; and
a reflective layer formed under the photodiodes and the deep trench isolation structures, wherein the reflective layer comprises:
a first oxide layer;
a first silicon layer formed under the first oxide layer;
a nitride layer formed under the first oxide layer;
a second oxide layer formed under the nitride layer; and
a second silicon layer formed under the nitride layer.
10. The image sensor defined in claim 9 , wherein the first oxide layer comprises an oxide selected from the group consisting of: dry oxide, hafnium oxide, and tantalum oxide.
11. An imager, comprising:
an array of front side illuminated pixels arranged in rows and columns, wherein the array of front side illuminated pixels comprises:
photodiodes formed in a substrate;
isolation structures formed between adjacent pairs of the photodiodes; and
a reflective stack formed under the isolation structures and the photodiodes, wherein the reflective stack comprises:
a first oxide layer;
a first silicon layer formed under the first oxide layer;
a nitride layer formed under the first oxide layer;
a second oxide layer formed under the nitride layer; and
a second silicon layer formed under the nitride layer.
12. The imager defined in claim 11 , the array of front side illuminated pixels further comprising:
an oxide layer formed over the photodiodes and the isolation structures; and
an interconnect layer formed over the oxide layer.
13. The imager defined in claim 12 , the array of front side illuminated pixels further comprising:
a color filter array formed over the interconnect layer; and
a passivation layer formed over the color filter array.
14. The imager defined in claim 13 , the array of front side illuminated pixels further comprising:
microlenses formed over the passivation layer; and
doped material interposed between each photodiode and respectively adjacent isolation structures.
15. The imager defined in claim 11 , wherein the reflective stack reflects infrared light.
16. The imager defined in claim 11 , wherein each of the isolation structures has a width and a depth and the ratio of the depth to the width is between 25 to 1 and 50 to 1.