IP Library Patent Application 14864060
Patent Application
App. No. 14/864,060

SPREAD SPECTRUM CLOCK GENERATOR AND METHOD THEREFOR

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Quick Facts
Patent No.
US None
App. No.
14/864,060
Abstract

In one form, a spread spectrum clock generator includes a clock generator and a modulator. The clock generator modulates a frequency of a reference clock signal using a modulation signal to provide a spread spectrum clock signal. The clock generator has a characteristic transfer function. The modulator generates the modulation signal according to a desired profile conditioned by an inverse of the characteristic transfer function of the clock generator.

Claims (41)

1 . A spread spectrum clock signal generator comprising:

a clock generator for modulating a frequency of a reference clock signal using a modulation signal to provide a spread spectrum clock signal, said clock generator having a characteristic transfer function at a predetermined nominal frequency; and

a modulator for generating said modulation signal according to a desired profile at said predetermined nominal frequency conditioned by an inverse of said characteristic transfer function of said clock generator, wherein said modulator comprises a profile memory that stores a waveform table of values of said modulation signal that provides a uniform frequency change over a predetermined period of time, and having an output for providing said modulation signal according to said desired profile, wherein said modulation signal is pre-distorted by said inverse of said characteristic transfer function of said clock generator and stored in said profile memory in pre-distorted form.

2 . The spread spectrum clock signal generator of claim 1 wherein said desired profile corresponds to a uniform frequency change over a predetermined period of time.

3 . The spread spectrum clock signal generator of claim 2 wherein said desired profile comprises a triangular wave profile over said predetermined period of time.

4 . The spread spectrum clock signal generator of claim 1 further comprising:

a reference oscillator for providing said reference clock signal as a square wave signal.

5 . (canceled)

6 . (canceled)

7 . The spread spectrum clock signal generator of claim 1 wherein said clock generator forms a phase locked loop, said clock generator comprising:

a loop divider having an input for receiving a divide value; anda delta-sigma modulator having an input for receiving said modulation signal, and an output for providing said divide value.

8 . A spread spectrum clock signal generator comprising:

a reference oscillator having an output for providing a reference clock signal wherein said reference clock signal is characterized as being a square wave having a substantially constant frequency;

a clock generator having a first input coupled to said output of said reference oscillator for receiving said reference clock signal, a second input for receiving a modulation signal, and an output for providing a spread spectrum clock signal, said clock generator having a characteristic transfer function; and

a modulator having an output coupled to said second input of said clock generator for providing said modulation signal according to a desired profile conditioned by an inverse of said characteristic transfer function of said clock generator, wherein said modulator comprises a profile memory that stores a waveform table of values of said modulation signal that provides a uniform frequency change over a predetermined period of time, and having an output for providing a sequence of signals representative of an amplitude of said modulation signal, wherein each of said sequence of signals is pre-distorted by said inverse of said characteristic transfer function of said clock generator and stored in said memory in pre-distorted form, and said modulator uses said reference clock signal to access locations of said profile memory.

9 . (canceled)

10 . (canceled)

11 . The spread spectrum clock signal generator of claim 8 wherein said clock generator forms a phase locked loop, said clock generator comprising:

a loop divider having an input for receiving a divide value; and

a delta-sigma modulator having an input for receiving said modulation signal, and an output for providing said divide value.

12 . The spread spectrum clock signal generator of claim 11 wherein said clock generator further comprises:

a reference divider having an input for receiving said reference clock signal, and an output;

a phase/frequency detector and charge pump having a first input coupled to said output of said reference divider, a second input for receiving a feedback signal, and an output;

a lowpass filter having an input coupled to said output of said phase/frequency detector and charge pump, and an output;

a voltage controlled oscillator having an input coupled to said output of said lowpass filter, and an output; and

an output divider having an input for receiving said output of said voltage controlled oscillator, and an output for providing said spread spectrum clock signal,

said loop divider having a first input coupled to said output of said voltage controlled oscillator, a second input coupled to said output of said delta-sigma modulator, and an output coupled to said second input of said phase/frequency detector and charge pump.

13 . (canceled)

14 . The spread spectrum clock signal generator of claim 8 wherein said profile memory provides said sequence of signals at a second frequency that is a fraction of a first frequency of said reference clock signal.

15 . A method comprising:

generating a spread spectrum clock signal by modulating a reference clock signal with a modulation signal, said generating having a characteristic transfer function; and

generating said modulation signal according to a desired profile conditioned by an inverse of said characteristic transfer function, wherein said generating said modulation signal comprises:

pre-distorting said desired profile according to said inverse of said characteristic transfer function to form samples of said modulation signal according to a pre-distorted profile;

storing said samples of said modulation signal in a memory in pre-distorted form, wherein said memory stores a waveform table of values of said modulation signal that provides a uniform frequency change over a predetermined period of time; and

reading out values from said memory to form said modulation signal.

16 . The method of claim 15 further comprising:

generating said reference clock signal as a square wave having a substantially constant frequency.

17 . The method of claim 15 wherein said generating said spread spectrum clock signal comprises generating said spread spectrum clock signal using a phase locked loop.

18 . The method of claim 17 wherein said generating said spread spectrum clock signal further comprises varying a value of a loop divide ratio of said phase locked loop.

19 . The method of claim 15 wherein said generating said modulation signal according to said desired profile comprises generating said modulation signal according to a triangular wave profile.

20 . The method of claim 15 wherein said generating said modulation signal according to said desired profile comprises generating said modulation signal according to an asymmetric triangular wave profile.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2015
From: DAN, TORU
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 036649/0274 →