IP Library Granted Patent US 7,459,729
Granted Patent B2
US 7,459,729 · App. 11/647,217 · Granted Dec 2, 2008

Semiconductor image device package with die receiving through-hole and method of the same

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Quick Facts
Patent No.
US 7,459,729
App. No.
11/647,217
Granted
Dec 2, 2008
Kind
B2
Abstract

The present invention discloses a structure of package including: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.

Claims (18)

1. A structure of semiconductor device package comprising:

a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad;

a die having a micro lens area disposed within said die receiving through hole;

a surrounding material formed under said die and filled in the gap between said die and sidewall of said die receiving though hole;

a dielectric layer formed on said die and said substrate to expose said micro lens area;

a re-distribution layer (RDL) formed on said dielectric layer and coupled to said first contact pad;

a protection layer formed over said RDL; and

a second contact pad formed at the lower surface of said substrate and under said connecting through hole structure.

2. The structure of claim 1 , further comprising conductive bumps coupled to said second contact pad.

3. The structure of claim 1 , wherein said RDL comprises Ti/Cu/Au alloy or Ti/Cu/Ni/Au alloy.

4. The structure of claim 1 , wherein the material of said substrate includes epoxy type FR5 or FR4.

5. The structure of claim 1 , wherein the material of said substrate includes BT, silicon, PCB (print circuit board) material, glass or ceramic.

6. The structure of claim 1 , wherein the material of said substrate includes alloy or metal.

7. The structure of claim 1 , wherein said surrounding material includes elastic core paste material.

8. The structure of claim 1 , further includes a protection layer formed over said micro lens area.

9. The structure of claim 1 , wherein said dielectric layer includes an elastic dielectric layer, a photosensitive layer, a silicone dielectric based layer, a siloxane polymer (SINR) layer, a polyimides (PI) layer or silicone resin layer.

10. The structure of claim 1 , wherein said semiconductor device package is formed on a print circuit board having traces; a lens holder being located on said print circuit board and cover said semiconductor device package; a lens being located atop of said lens holder and a filter being formed between said lens and said semiconductor device package.

11. The structure of claim 10 , further comprising a passive device formed on said print circuit board and within or outside said lens holder.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2023
From: ADL ENERGY CORP.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 065957/0661 →
MERGER Recorded Sep 15, 2023
From: ADL ENGINEERING INC.; ADVANCED CHIP ENGINEERING TECHNOLOGY INC.
To: ADL ENGINEERING INC.
Reel/Frame 064926/0845 →
CHANGE OF NAME Recorded Sep 15, 2023
From: ADL ENGINEERING INC.
To: ADL ENERGY CORP.
Reel/Frame 064927/0462 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2006
From: YANG, WEN-KUN; CHANG, JUI-HSIEN; WANG, TUNG-CHUAN
To: ADVANCED CHIP ENGINEERING TECHNOLOGY INC.
Reel/Frame 018760/0595 →