Methods of forming integrated circuit structures using insulator deposition and insulator gap filling techniques
View Patent ↗Methods of forming integrated circuit devices include depositing an electrically insulating layer onto an integrated circuit substrate having integrated circuit structures thereon. This deposition step results in the formation of an electrically insulating layer having an undulating surface profile, which includes at least one peak and at least one valley adjacent to the at least one peak. A non-uniform thickening step is then performed. This non-uniform thickening step includes thickening a portion of the electrically insulating layer by redepositing portions of the electrically insulating layer from the least one peak to the at least one valley. This redeposition occurs using a sputter deposition technique that utilizes the electrically insulating layer as a sputter target.
1. A method of forming an integrated circuit device, comprising the steps of:
depositing an electrically insulating layer onto an integrated circuit substrate, said electrically insulating layer having an undulating surface profile with at least one peak and at least one valley; and
thickening a portion of the electrically insulating layer by redepositing portions of the electrically insulating layer from the least one peak to the at least one valley using a sputter deposition technique that utilizes the electrically insulating layer as a sputter target.
2. The method of claim 1 , wherein said depositing step comprises depositing the electrically insulating layer onto the integrated circuit substrate using a plasma deposition process.
3. The method of claim 1 , wherein said depositing step comprises depositing a silicon nitride layer using a first plasma that receives an inert gas, a nitrogen containing gas and a silicon containing gas as source gases.
4. The method of claim 3 , wherein the inert gas is an argon gas and the silicon containing gas is SiH4.
5. The method of claim 3 , wherein said thickening step comprises redepositing portions of the silicon nitride layer using a second plasma that receives the inert gas and the nitrogen containing gas as source gases.
6. The method of claim 5 , wherein a plasma bias power used to establish the second plasma is greater than about two times a plasma bias power used to establish the first plasma.
7. The method of claim 5 , wherein said thickening step is followed by a step of depositing additional silicon nitride onto the silicon nitride layer using a third plasma equivalent to the first plasma.
8. The method of claim 1 , wherein said depositing step is preceded forming first and second insulated gate electrodes at side-by-side locations on the integrated circuit substrate; and wherein said depositing step comprises depositing the electrically insulating layer as a silicon nitride layer on the first and second insulated gate electrodes and in a gap between the first and second insulated gate electrodes.
9. The method of claim 8 , wherein said depositing step comprises using a chemical vapor deposition process and/or a plasma deposition process to deposit the silicon nitride layer.
10. A method of forming an integrated circuit device, comprising the steps of:
forming first and second integrated circuit structures on an integrated circuit substrate;
depositing an electrically insulating layer onto the first and second integrated circuit structures and into a gap extending between the first and second integrated circuit structures; and
thickening a portion of the electrically insulating layer located in the gap by transferring portions of the electrically insulating layer extending opposite the first and second integrated circuit structures into the gap using a sputtering process.
11. The method of claim 10 , wherein said depositing step comprises depositing the electrically insulating layer using a first plasma established at a first power level; and wherein said thickening step comprises transferring portions of the electrically insulating layer extending opposite the first and second integrated circuit structures into the gap using a sputtering process that includes establishing a second plasma at a second power level at least two times greater than the first power level.
12. The method of claim 11 , wherein the first plasma receives an inert gas, a nitrogen containing gas and a silicon containing gas as source gases; and wherein the second plasma receives an inert gas and a nitrogen containing gas, but no silicon containing gas, as source gases.
13. The method of claim 10 , wherein said depositing step comprises depositing the electrically insulating layer using a plasma-enhanced chemical vapor deposition process.
14. The method of claim 13 , wherein the plasma-enhanced chemical vapor deposition process and the sputtering process are performed in different processing chambers.
15. A method of forming an integrated circuit device, comprising the steps of:
forming a silicon nitride layer having an undulating surface profile, on an integrated circuit substrate; and
sputter depositing silicon nitride into at least one valley in the undulating surface profile, using at least one peak in the undulating surface profile as a sputter target.
16. The method of claim 15 , wherein said sputter depositing step comprises exposing the at least one peak in the undulating surface profile to a second plasma containing nitrogen ions.
17. The method of claim 16 , wherein said forming step comprises exposing the integrated circuit substrate to a first plasma containing nitrogen and silicon ions.
18. The method of claim 17 , wherein an RF bias power used to establish the second plasma is greater than about two times an RF bias power to establish the first plasma.
19. The method of claim 18 , wherein the first and second plasmas are established in the same plasma processing chamber.
20. A method of forming an integrated circuit device, comprising the steps of:
depositing an electrically insulating layer on an integrated circuit substrate using a first deposition technique; and
recessing a first portion of the electrically insulating layer using a plasma redeposition technique having different process conditions relative to the first deposition technique, by bombarding the first portion of the electrically insulating layer with a sufficient quantity of plasma ions to thereby physically remove electrically insulating material from the first portion of the electrically insulating layer and redeposit the removed electrically insulating material on a second portion of the electrically insulating layer.
21. The method of claim 1 , wherein said recessing step is followed by a step of exposing the electrically insulating layer to UV radiation.
22. The method of claim 1 , wherein said depositing step comprises depositing the electrically insulating layer using a first plasma established in a plasma deposition chamber; and wherein said thickening step comprises adjusting a composition of the first plasma by lowering a concentration of at least one source gas supplied thereto, to thereby cause recession of the at least one peak and redepositing of material removed from the at least one peak into the at least one valley.
23. The method of claim 22 , wherein said adjusting step is followed by a step of readjusting the composition of the first plasma by increasing the concentration of the at least one source gas supplied thereto, to thereby cause deposition of additional electrically insulating material on the at least one peak.