On-chip data grouping and alignment
View Patent ↗The invention describes the method for regrouping data read from multi-sector pages inside a memory chip. As a result, garbage collection operation time greatly reduces and overall system performance increases. Architectural features include the ability to selectively transfer individual data sectors of a page between on-chip registers and the ability to realign data sectors within a register.
1. A method of operating a memory system including a controller and a memory device, the memory device having a memory array and a plurality of data registers, the method comprising:
reading from the array to the registers data from a plurality of pages;
combining within the registers data from the multiple ones of the plurality of pages into a single page in one of the registers; and
writing the page of combined sectors to the memory array.
2. The method of claim 1 , the method further comprising:
subsequent to said reading of data and prior to said writing the page of combined sectors, transferring data from one or more of said multiple pages to the controller for performing an error correction and detection operation therein.
3. A method of operating a memory system including a controller and a memory device, the memory device having a plurality of memory arrays each having a corresponding plurality of data registers, the method comprising:
reading from the arrays to the registers data from a plurality of meta-pages;
combining within the registers data from the multiple ones of the plurality of meta-pages into a single meta-page in the registers; and
writing the meta-page of combined sectors to the memory array.
4. The method of claim 3 , the method further comprising:
subsequent to said reading of data and prior to said writing the meta-page of combined sectors, transferring data from one or more of said multiple pages to the controller for performing an error correction and detection operation therein.