IP Library Granted Patent US 7,474,238
Granted Patent B2
US 7,474,238 · App. 11/700,130 · Granted Jan 6, 2009

Analog-to-digital converter

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Quick Facts
Patent No.
US 7,474,238
App. No.
11/700,130
Granted
Jan 6, 2009
Kind
B2
Abstract

An A-D converter includes a group of resistors, a group of comparators, an encoder and an output unit. The output unit includes a correction circuit. An inverter constitutes the correction circuit. The encoder is shared in a case where the A-D converter converts an inputted analog signal to a two-bit binary code and a case where the A-D converter converts the inputted analog signal to a 4-bit binary code. The correction circuit corrects the output of the encoder when the A-D converter is to convert the inputted analog signal to the 2-bit binary code.

Claims (15)

1. An analog-to-digital converter, which converts an input analog signal to a digital value of a first number of bits, the analog-to-digital converter comprising:

a plurality of comparators, arranged in parallel, which each compares the input analog signal with a predetermined reference voltage wherein the number of comparators is determined based on the first number of bits;

an encoder which converts outputs of the plurality of comparators to digital values of the first number of bits; and

an output unit which outputs the digital values converted by said encoder,

wherein when said analog-to-digital converter is to convert the input analog signal to a digital value of a second number of bits which is less than the first number of bits, said output unit corrects the digital value converted by said encoder to the digital value of the second number of bits that said analog-to-digital converter is to generate.

2. An analog-to-digital converter according to claim 1 , wherein the first number of bits is four,

wherein the second number of bits is two,

wherein said output unit includes an inverter which inverts a lower second bit in the digital value converted by said encoder, and

said output unit outputs an output of the inverter and a value of the least significant bit in the digital value converted by said encoder, as the digital value of the second number of bits to be generated by said analog-to-digital converter.

3. An analog-to-digital converter comprising

a plurality of comparators which each compares an input analog signal with a predetermined reference voltage;

an encoder which converts outputs of the plurality of comparators to digital values wherein said encoder is configured in response to a case where the analog signal and the predetermined reference voltage are inputted to the plurality of comparators, respectively, under a first scheme where the output of a comparator indicates a high level if the level of an analog signal to be converted is greater than the reference voltage; and

a correction circuit which corrects the digital values converted by said encoder, in a case where the analog signal and the predetermined reference voltage are inputted to the plurality of comparators, respectively, under a second scheme that differs from the first scheme, where the output of a comparator indicates a high level if the level of an analog signal to be converted is less than the reference voltage, and

wherein the levels of the respective outputs in the plurality of comparators are inverted between in a case where the analog signal and the predetermined reference voltage are inputted under the first scheme and a case where the analog signal and the predetermined reference voltage are inputted under the second scheme, and

wherein said correction circuit includes an inverter which inverts the digital values converted by said encoder.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
FIRST SUPPLEMENTAL PATENT SECURITY AGREEMENT Recorded Jun 3, 2009
From: DATA DEVICE CORPORATION
To: UBS AG, STAMFORD BRANCH, AS COLLATERAL AGENT
Reel/Frame 022777/0101 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2007
From: KOBAYASHI, SHIGETO
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 018872/0780 →