IP Library › Patent Application 11707673
Patent Application Utility
App. No. 11/707,673 · Confirmation No. 1363

Embedded dram cache memory and method having reduced latency

Inventor: Joseph Jeddeloh
Abandoned -- Failure to Respond to an Office Action View Publication ↗
⬇ PDF
 Code Description Pages PDF
2007-12-06 ABN Abandonment 2 View
2007-12-06 BIB Bibliographic Data Sheet 1 View
2007-07-19 NTC.PUB Notice of Publication 1 View
2007-05-22 CTNF Non-Final Rejection 8 View
2007-05-22 892 List of references cited by examiner 1 View
2007-05-22 BIB Bibliographic Data Sheet 1 View
2007-05-22 FWCLM Index of Claims 1 View
2007-05-22 SRFW Search information including classification, databases and other search related notes 1 View
2007-05-14 SRNT Examiner's search strategy and results 2 View
2007-04-25 WFEE Fee Worksheet (SB06) 1 View
2007-04-12 APP.FILE.REC Filing Receipt 3 View
2007-02-16 TRNA Transmittal of New Application 2 View
2007-02-16 136A Authorization for Extension of Time all replies 2 View
2007-02-16 SPEC Specification 11 View
2007-02-16 CLM Claims 13 View
2007-02-16 ABST Abstract 1 View
2007-02-16 DRW Drawings-only black and white line drawings 3 View
2007-02-16 OATH Oath or Declaration filed 12 View
2007-02-16 WFEE Fee Worksheet (SB06) 1 View
2007-02-16 WFEE Fee Worksheet (SB06) 1 View
2007-02-16 A.PE Preliminary Amendment 1 View
2007-02-16 SPEC Specification 1 View
2007-02-16 CLM Claims 1 View
2007-02-16 REM Applicant Arguments/Remarks Made in an Amendment 1 View
2007-02-16 ADS Application Data Sheet 2 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
App. No.
11/707,673
Filed
2007-02-16
Pub. No.
US20070168616A1
Art Unit
2189