Granted Patent
Utility
US 6,789,169
· Confirmation No. 4313
EMBEDDED DRAM CACHE MEMORY AND METHOD HAVING REDUCED LATENCY
Inventor:
Joseph Jeddeloh
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-07-30 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2004-06-08 | LET. |
Miscellaneous Incoming Letter | 2 | View | |
| 2004-06-08 | DRW |
Drawings-only black and white line drawings | 3 | View | |
| 2001-10-04 | TRNA |
Transmittal of New Application | 3 | View | |
| 2001-10-04 | ADS |
Application Data Sheet | 1 | View | |
| 2001-10-04 | SPEC |
Specification | 11 | View | |
| 2001-10-04 | CLM |
Claims | 13 | View | |
| 2001-10-04 | ABST |
Abstract | 1 | View | |
| 2001-10-04 | DRW |
Drawings-only black and white line drawings | 3 | View | |
| 2001-10-04 | OATH |
Oath or Declaration filed | 4 | View |
Inventors
Joseph Jeddeloh
Minneapolis, MN
Attorneys & Agents of Record
Classification
USPC
711/118
G06F12/0893
G06F12/0897
Prosecution
- Examiner
- ELMORE, REBA I
- Art Unit
- 2187
- Customer No.
- 27076
- Docket No.
- 500890.01
- Confirmation No.
- 4313
Publication
- Pub. No.
- US20030070044A1
- Pub. Date
- 2003-04-10
Patent Term Adjustment
-95days
RELEASE OF SECURITY INTEREST
Recorded 2019-11-12
RELEASE OF SECURITY INTEREST
Recorded 2019-10-09
RELEASE OF SECURITY INTEREST
Recorded 2018-08-23
SECURITY INTEREST
Recorded 2018-07-13
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST.
Recorded 2017-06-08
PATENT SECURITY AGREEMENT
Recorded 2016-06-02
SECURITY INTEREST
Recorded 2016-05-12
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Quick Facts
- Patent No.
- US 6,789,169
- App. No.
- 09/971,841
- Filed
- 2001-10-04
- Granted
- 2004-09-07
- Pub. No.
- US20030070044A1
- Examiner
- ELMORE, REBA I
- Art Unit
- 2187
- PTA
- -95 days
External Links