IP Library Granted Patent US 6,789,169
Granted Patent Utility
US 6,789,169 · Confirmation No. 4313

EMBEDDED DRAM CACHE MEMORY AND METHOD HAVING REDUCED LATENCY

Inventor: Joseph Jeddeloh
⬇ PDF
Code Description Pages PDF
2004-07-30 IFEE Issue Fee Payment (PTO-85B) 1 View
2004-06-08 LET. Miscellaneous Incoming Letter 2 View
2004-06-08 DRW Drawings-only black and white line drawings 3 View
2001-10-04 TRNA Transmittal of New Application 3 View
2001-10-04 ADS Application Data Sheet 1 View
2001-10-04 SPEC Specification 11 View
2001-10-04 CLM Claims 13 View
2001-10-04 ABST Abstract 1 View
2001-10-04 DRW Drawings-only black and white line drawings 3 View
2001-10-04 OATH Oath or Declaration filed 4 View
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Quick Facts
Patent No.
US 6,789,169
App. No.
09/971,841
Filed
2001-10-04
Granted
2004-09-07
Pub. No.
US20030070044A1
Art Unit
2187
PTA
-95 days