Field-effect transistor
View Patent ↗A field-effect transistor has a so-called double heterostructure which is formed such that a channel layer through which electrons travel is provided between an electron supply layer and a liner layer, wherein a forbidden band width of the liner layer and a forbidden band width of the electron supply layer are broader than a forbidden bandwidth of the channel layer.
1. A field-effect transistor, comprising:
a liner layer;
a channel layer; and
an electron supply layer,
wherein the liner layer, the channel layer, and the electron supply layer are formed of a group-III nitride semiconductor and provided in this order on a substrate, and
a forbidden band width of the channel layer is narrower than a forbidden band width of the liner layer and a forbidden band width of the electron supply layer,
wherein the forbidden band width of the liner layer monotonically increases from part of the liner layer in direct contact with the channel layer to part of the liner layer closer to the substrate.
2. A field-effect transistor of claim 1 , wherein the forbidden band width of the part of the liner layer in direct contact with the channel layer is narrower than the forbidden band width of part of the electron supply layer in direct contact with the channel layer.
3. A field-effect transistor of claim 1 , further comprising:
a recess in the electron supply layer; and
a gate electrode provided in contact with a bottom surface of the recess.
4. A field-effect transistor of claim 1 , wherein the group-III nitride semiconductor has such a plane orientation that a polarization electric field is generated perpendicularly to a crystal surface.
5. A field-effect transistor of claim 1 , wherein each of the liner layer and the electron supply layer is formed of Al x Ga 1-x N (0<x≦1).
6. A field-effect transistor of claim 1 , wherein the channel layer is formed of GaN or In x Ga 1-x N (0<x≦1).
7. A field-effect transistor of claim 1 , wherein the liner layer includes an AlN layer and an Al x Ga 1-x N layer (0<x≦1) formed on the AlN layer.
8. A field-effect transistor of claim 7 , wherein the AlN layer has a film thickness equal to or greater than 1 μm.
9. A field-effect transistor of claim 7 , wherein the Al content in the Al x Ga 1-x N layer monotonously reduces from part of the Al x Ga 1-x N layer closer to the substrate to part of the Al x Ga 1-x N layer closer to the channel layer, and the Al x Ga 1-x N layer is in contact with the channel layer.
10. A field-effect transistor of claim 7 , wherein the Al x Ga 1-x N layer has a thickness equal to or greater than 0.5 μm.
11. A field-effect transistor of claim 7 , wherein the channel layer has a thickness equal to or less than 10 nm.
12. A field-effect transistor of claim 1 , wherein the substrate is formed of sapphire, SiC, GaN, or Si.
13. A field-effect transistor of claim 1 ,
wherein the liner layer includes a GaN layer, a first Al x Ga 1-x N (0≦x≦1) layer formed on the GaN layer, and a second Al y Ga 1-y N (0<y≦1) layer formed on the first Al x Ga 1-x N layer, and
the Al content in the first Al x Ga 1-x N layer monotonously reduces from a lower surface of the second Al y Ga 1-y N layer to an upper surface of the GaN layer.