IP Library Granted Patent US 7,746,232
Granted Patent B2
US 7,746,232 · App. 11/712,361 · Granted Jun 29, 2010

Electronic substrate, semiconductor device, and electronic device

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Quick Facts
Patent No.
US 7,746,232
App. No.
11/712,361
Granted
Jun 29, 2010
Kind
B2
Abstract

An electronic substrate including: a base substrate having an active face and a rear face; and a plurality of inductor elements formed on or above the active face, or formed on or above the rear face.

Claims (33)

1. An electronic substrate comprising:

a base substrate having an active face and a rear face;

a passivation film formed on the active face of the base substrate;

a plurality of inductor elements formed on or above the active face, or formed on or above the rear face, and having a winding wire, the winding wire having an inner end and an outer end;

a first electrode and a second electrode formed in an array at a peripheral portion of the active face of the base substrate;

a first connecting wire formed on the passivation film and connected to the first electrode;

a dielectric layer formed between at least some of the inductor elements and the base substrate so as to cover the first connecting wire, including a through hole in which the inner end of the winding wire is connected to the first connecting wire; and

a second connecting wire connected to the outer end of the winding wire, connected to the second electrode, and formed on the dielectric layer.

2. The electronic substrate according to claim 1 , wherein

the inductor elements include:

a first inductor element; and

a second inductor element having an inductance value or an applicable frequency that are different from that of the first inductor element.

3. The electronic substrate according to claim 2 , wherein

the first inductor element is used for external power transmission, and the second inductor element is used for external communications.

4. The electronic substrate according to claim 2 , further comprising:

a connection terminal formed on the base substrate, used for external power transmission, wherein

the first inductor element and the second inductor element are used for external communications.

5. The electronic substrate according to claim 1 , wherein:

the dielectric layer is made of material having a dielectric dissipation factor smaller than that of the base substrate.

6. The electronic substrate according to claim 1 , wherein the inductor elements include:

a first inductor element; and

a second inductor element, wherein the number of turns in the winding wire of the second inductor element is more than that of the winding wire in the first inductor element.

7. A semiconductor device, comprising:

a plurality of electronic substrates, each of which includes:

a base substrate having an active face and a rear face;

a passivation film formed on the active face of the base substrate:

a plurality of inductor elements formed on or above the active face, or on or above the rear face, and having a winding wire, the winding wire having an inner end and an outer end;

a first electrode and a second electrode formed in an array at a peripheral portion of the active face of the base substrate;

a first connecting wire formed on the passivation film and connected to the first electrode;

a dielectric layer formed between at least some of the inductor element and the base substrate so as to cover the first connecting wire, including a through hole in which the inner end of the winding wire is connected to the first connecting wire; and

a second connecting wire connected to the outer end of the winding wire, connected to the second electrode, and formed on the dielectric layer,

wherein the electronic substrates are disposed so as to be laminated, the inductor element functions as an antenna sending or receiving electromagnetic waves so as to send or receive signals between the electronic substrates.

8. The semiconductor device according to claim 7 , wherein the inductor elements formed on a pair of the electronic substrates sending or receiving signals are disposed to face each other.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2021
From: ADVANCED INTERCONNECT SYSTEMS LIMITED
To: NVIDIA CORPORATION
Reel/Frame 056754/0070 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: SEIKO EPSON CORPORATION
To: ADVANCED INTERCONNECT SYSTEMS LIMITED
Reel/Frame 044938/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2007
From: HASHIMOTO, NOBUAKI
To: SEIKO EPSON CORPORATION
Reel/Frame 019054/0154 →