IP Library Granted Patent US 8,766,408
Granted Patent B2
US 8,766,408 · App. 11/714,906 · Granted Jul 1, 2014

Semiconductor device and manufacturing method thereof

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Quick Facts
Patent No.
US 8,766,408
App. No.
11/714,906
Granted
Jul 1, 2014
Kind
B2
Abstract

A packaged semiconductor device is manufactured by a simplified manufacturing process, and is reduced in cost, in thickness and in size. A device component and a pad electrode connected with the device component are formed on a semiconductor substrate. A supporter is bonded to a top surface of the semiconductor substrate through an adhesive layer. Then, there is formed a protection layer that has an opening at a location corresponding to the pad electrode and covers a side surface and a back surface of the semiconductor substrate. A conductive terminal is formed on the pad electrode at the location corresponding to the opening formed in the protection layer. No wiring layer or conductive terminal is formed on the back surface of the semiconductor substrate. A conductive terminal is formed on a periphery of the supporter outside of and next to the side surface of the semiconductor substrate.

Claims (27)

1. A semiconductor device comprising:

a semiconductor substrate comprising a top surface and a bottom surface;

a supporter, a first surface of which is attached to the top surface of the semiconductor substrate so that an edge portion of the semiconductor substrate recedes from a corresponding edge portion of the supporter;

a connecting electrode disposed on the first surface of the supporter;

a protection layer covering a side surface of the semiconductor substrate and having an opening at the connecting electrode; and

a passivation film covering a portion of the connecting electrode so that the covering portion of the passivation film is disposed between the supporter and the connecting electrode,

wherein no wiring layer is formed on the bottom surface of the semiconductor substrate, and

the passivation film comprises an insulating material and is disposed between the semiconductor substrate and the supporter.

2. The semiconductor device of claim 1 , wherein the opening of the protection layer is located over a first principal surface of the connecting electrode, and a second principal surface of the connecting electrode faces the supporter.

3. The semiconductor device of claim 1 , further comprising a conductive terminal disposed on the connecting electrode.

4. The semiconductor device of claim 1 , wherein the supporter has a through-hole penetrating through the supporter.

5. The semiconductor device of claim 4 , wherein the through-hole is formed at a location over the connecting electrode.

6. The semiconductor device of claim 4 , further comprising a conductive material disposed in the through-hole of the supporter.

7. The semiconductor device of claim 1 , wherein the bottom surface of the semiconductor substrate is not covered with the protection layer.

8. The semiconductor device of claim 1 , further comprising an adhesive layer connecting the first surface of the supporter and the top surface of the semiconductor substrate so that a cavity is formed between the semiconductor substrate and the supporter.

9. A stacked semiconductor device comprising:

a first semiconductor device; and

a second semiconductor device stacked on the first semiconductor device, wherein each of the semiconductor devices comprises;

a semiconductor substrate comprising a top surface and a bottom surface,

a supporter, a first surface of which is attached to the top surface of the semiconductor substrate so that an edge portion of the semiconductor substrate recedes from a corresponding edge portion of the supporter,

a connecting electrode disposed on the first surface of the supporter, and

a protection layer covering a side surface of the semiconductor substrate and having an opening at the connecting electrode, and

a passivation film covering a portion of the connecting electrode so that the covering portion of the passivation film is disposed between the supporter and the connecting electrode, the passivation film comprising an insulating material and being disposed between the semiconductor substrate and the supporter,

wherein no wiring layer is formed on the bottom surface of the semiconductor substrate and the supporter has a through-hole penetrating through the supporter, and

the connecting electrode of the first semiconductor device is connected electrically with the connecting electrode of the second semiconductor device.

10. The semiconductor device of claim 1 , further comprising a circuit board on which the semiconductor substrate attached to the supporter is mounted.

11. The semiconductor device of claim 1 , wherein the passivation film comprises a silicon nitride film.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2014
From: SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032022/0269 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2007
From: NOMA, TAKASHI; OTSUKA, SHIGEKI; MORITA, YUICHI; OKADA, KAZUO; YAMADA, HIROSHI; KITAGAWA, KATSUHIKO; OKUBO, NOBORU; ISHIBE, SHINZO; SHINOGI, HIROYUKI
To: SANYO ELECTRIC CO., LTD.; SANYO SEMICONDUCTOR CO., LTD.
Reel/Frame 019336/0726 →