Semiconductor device and manufacture method thereof
View Patent ↗A joint board is arranged between an upper package and a lower package. The arrangement of the joint board makes it possible to reduce the size of solder balls and to arrange them with narrower pitch. The joint board has slightly greater dimensions those of the upper package and the lower package. This makes it possible to prevent underfill from leaking and spreading.
1. A semiconductor device, comprising:
a first package comprising a first semiconductor element;
a second package for stacking over the first package, the second package comprising a second semiconductor element; and
a joint board arranged between the first package and the second package, the joint board comprising:
an outer periphery having a size that is greater than a size of an outer periphery of the first package and a size of an outer periphery of the second package; and
an opening having a size that is greater than a size of a surface area of the first semiconductor element,
wherein a space between the joint board and the first and second packages is filled with an underfill material, said underfill material extending from the outer peripheries of the first and second packages to the outer periphery of the joint board.
2. The semiconductor device according to claim 1 , wherein the first semiconductor element arranges in the opening.
3. The semiconductor device according to claim 1 , wherein the first semiconductor element is smaller than the second semiconductor element.
4. The semiconductor device according to claim 1 , wherein the joint board is connected to the first package and the second package by one of solder balls, solder paste, and solder flux.
5. The semiconductor device according to claim 1 , wherein each side of the joint board is greater than each side of the first and second packages by 50 μm or more.
6. The semiconductor device according to claim 1 , wherein the joint board comprises:
a first main surface comprising a plurality of first electrodes connected to a plurality of electrodes of the first package; and
a second main surface opposing to the first main surface having a plurality of second electrodes connected to a plurality of electrodes of the second package.
7. The semiconductor device according to claim 1 , wherein the joint board comprises a wiring pattern having a design based on the first package and the second package.
8. The semiconductor device according to claim 1 , wherein the size of the first package and the size of the second package is the same.
9. The semiconductor device according to claim 1 , wherein the first package comprises a wiring board,
wherein the first semiconductor element is mounted on a surface of the wiring board, and
wherein a plurality of first electrodes are formed on the surface of the wiring board.
10. The semiconductor device according to claim 1 , wherein said opening comprises an application of said underfill material.
11. The semiconductor device according to claim 1 , wherein said underfill material extends from the outer peripheries of the first and second packages in an outward direction to the outer periphery of the joint board.
12. A joint board for connecting electronic devices, comprising:
a plurality of first joint board terminals formed on a first surface of the joint board to connect a first package and the joint board;
a plurality of second joint board terminals formed on a second surface of the joint board opposing to the first surface to connect a second package and the joint board; and
an opening formed in a center portion of the joint board, said opening having a size that is greater than a size of a surface area of a first semiconductor element of the first package,
wherein the joint board comprises an outer periphery having a size that is greater than a size of an outer periphery of the first package and a size of an outer periphery of the second package, and
wherein a space between the joint board and the first and second packages is filled with an underfill material, said underfill material extending from the outer peripheries of the first and second packages to the outer periphery of the joint board.
13. The joint board according to claim 12 , wherein the plurality of first terminals and the plurality of second terminals comprise one of solder balls, solder paste, and solder flux.
14. The joint board according to claim 12 , further comprising:
a wiring pattern having a design based on the first and second packages.
15. The joint board according to claim 12 , wherein said opening comprises an application of said underfill material.
16. The joint board according to claim 12 , wherein said underfill material extends from the outer peripheries of the first and second packages in an outward direction to the outer periphery of the joint board.