Duty cycle comparator
View Patent ↗A duty cycle comparator is described for comparing the duty cycles of two digital signals. The duty cycle comparator comprises a first controllable current source, a second controllable current source and a charge accumulation device. The comparator provides an output signal that is representative of the difference between the duty cycles independent of the frequency of the two digital signals.
1. A duty cycle comparator, comprising:
a first input to receive a first digital signal having a first duty cycle;
a second input to receive a second digital signal having a second duty cycle, said second digital signal not having a direct relationship to said first digital signal;
a first controlled current source having a control input coupled to said first input; a second controlled current source having a control input coupled said second input; and
a charge accumulation device coupled to said first and second controlled current sources, said first controlled current source changing in a first direction the charge accumulated by said charge accumulation device in response to said first digital signal, said second controlled current source changing in a direction opposite to said first direction the charge accumulated by said charge accumulation device in response to said second digital signal, said charge accumulation device producing an output signal representative of the difference in duty cycles of said first digital signal and said second digital signal.
2. A duty cycle comparator in accordance with claim 1 , wherein:
said charge accumulation device comprises a capacitor.
3. A duty cycle comparator in accordance with claim 2 , wherein:
said first digital signal is at a first frequency and said second digital signal is at a second frequency different from said first frequency.
4. A duty cycle comparator in accordance with claim 3 , wherein:
said first frequency is higher than said second frequency.
5. A duty cycle comparator in accordance with claim 4 , wherein:
said first digital signal is a PWM signal and said second digital signal is a PWM signal.
6. A duty cycle comparator in accordance with claim 5 , wherein:
said output signal is an analog voltage signal.
7. A duty cycle comparator in accordance with claim 1 , wherein:
said first digital signal is at a first frequency and said second digital signal is at a second frequency different from said first frequency.
8. A duty cycle comparator in accordance with claim 7 , wherein:
said first frequency is higher than said second frequency.
9. A duty cycle comparator in accordance with claim 8 , wherein:
said first digital signal is a PWM signals and said second digital signal is a PWM signal.
10. A duty cycle comparator in accordance with claim 9 , wherein:
said output signal is an analog voltage signal.
11. A duty cycle comparator in accordance with claim 1 , wherein:
said charge accumulation device produces said output signal representative of the difference in duty cycles of said first digital signal and said second digital signal independent of the frequencies of the first digital signal and the second digital signal.
12. A method of comparing duty cycles of two digital signals, said method comprising:
receiving a first digital signal having a first duty cycle;
receiving second digital signal having a second duty cycle, said second digital signal nor having a direct relationship to said first digital signal;
providing a charge accumulation device;
controlling a first controlled current source with said first digital signal to change, in a first direction, the charge accumulated by said charge accumulation device;
controlling a second controlled current source with said second digital signal to change, in a second direction opposite to said first direction said charge accumulated by said accumulation device;
using the charge on said charge accumulation device to produce an output signal representative of the difference in duty cycles of said first digital signal and said second digital signal.
13. A method in accordance with claim 12 , comprising:
utilizing a capacitor as said charge accumulation device.
14. A method in accordance with claim 13 , comprising:
providing said first digital signal at a first frequency; and
providing said second digital signal at a second frequency different from said first frequency.
15. A method in accordance with claim 13 , comprising:
providing said first digital signal at a first frequency; and
providing said second digital signal at a second frequency different from and lower than said first frequency.
16. A method in accordance with claim 15 , comprising:
providing said first digital signal as a PWM signal; and
providing said second digital signal as a PWM signal.
17. A method in accordance with claim 16 , comprising:
providing said output signal is an analog voltage signal.
18. A method in accordance with claim 13 , comprising:
providing said first digital signal as a PWM signal; and
providing said second digital signal as a PWM signal.
19. A method in accordance with claim 12 , comprising:
providing said first digital signal at a first frequency; and
providing said second digital signal at a second frequency different from said first frequency.
20. A method in accordance with claim 19 , wherein:
said first frequency is higher than said second frequency.
21. A method in accordance with claim 20 , comprising:
providing said first digital signal as a PWM signal; and
providing said second digital signal as a PWM signal.
22. A method in accordance with claim 12 , comprising:
providing said first digital signal as a PWM signal; and
providing said second digital signal as a PWM signal.
23. A method in accordance with claim 12 , comprising:
using the charge on said charge accumulation device to produce an output signal representative of the difference in duty cycles of said first digital signal and said second digital signal, independent of the frequencies of the first digital signal and the second digital signal.
24. A method of comparing duty cycles of two digital signals, said method comprising:
receiving a first digital signal having a first duty cycle;
receiving a second digital signal having a second duty cycle, said second digital signal not having a direct relationship to said first digital signal;
providing a charge accumulation device;
controlling a first controlled current source with said first digital signal to charge said charge accumulation device;
controlling a second controlled current source with said second digital signal to discharge said charge accumulation device;
using the charge on said charge accumulation device to produce an output signal representative of the difference in duty cycles of said first digital signal and said second digital signal, independent of the frequencies of the first digital signal and the second digital signal.