IP Library Granted Patent US 7,634,849
Granted Patent B2
US 7,634,849 · App. 11/736,307 · Granted Dec 22, 2009

Method of assembling and testing an electronics module

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Quick Facts
Patent No.
US 7,634,849
App. No.
11/736,307
Granted
Dec 22, 2009
Kind
B2
Abstract

An electronics module is assembled by demountably attaching integrated circuits to a module substrate. The module is then tested at a particular operating speed. If the module fails to operate correctly at the tested speed, the integrated circuit or circuits that caused the failure are removed and replaced with new integrated circuits, and the module is retested. Once it is determined that the module operates correctly at the tested speed, the module may be rated to operate at the tested speed and sold, or the module may be tested at a higher speed.

Claims (62)

1. A method of making an electronics module, where said electronics module is to operate at one of a predetermined plurality of operating speeds, said method comprising:

providing a plurality of integrated circuits;

testing each of said integrated circuits to determine a maximum of said operating speeds at which each of said integrated circuits is capable of operating;

sorting said integrated circuits into groups in accordance with said operating speeds;

determining which of said groups includes sufficient integrated circuits for at least one electronics module;

selecting one of said determined groups;

assembling an electronics module by demountably attaching integrated circuits from said selected group to a module substrate;

testing said demountably assembled module at an operating speed corresponding to said selected group;

if said module fails said testing at said operating speed:

removing at least one of said integrated circuits determined to have caused said failure from said module substrate,

replacing said at least one removed integrated circuit with another integrated circuit from said selected group, and

repeating said testing step at said operating speed and, if said module again fails said testing, repeating said removing, replacing, and repeating steps.

2. The method of claim 1 , wherein said step of selecting one of said determined groups comprises selecting a group that corresponds to a highest operating speed of said groups determined at said step of determining which of said groups includes sufficient integrated circuits for at least one electronics module.

3. The method of claim 1 , wherein each of said operating speeds is assigned a priority, and said step of selecting one of said determined groups comprises selecting a group that corresponds to a highest of said assigned priorities among said groups determined at said step of determining which of said groups includes sufficient integrated circuits for at least one electronics module.

4. The method of claim 1 , further comprising returning said at least one removed integrated circuit to said integrated circuit groups in accordance with a downgraded maximum operating speed.

5. The method of claim 1 , wherein sorting said integrated circuits into groups in accordance with said operating speeds comprises sorting based on actual tested speed without a guard band.

6. The method of claim 1 , wherein sorting said integrated circuits into groups in accordance with said operating speeds comprises sorting with a guard band of less than 10 MHz.

7. The method of claim 1 , further comprising permanently attaching said integrated circuits to said module substrate if said module passes said testing at said operating speed.

8. The method of claim 1 , further comprising:

if said module passes said testing at said operating speed:

removing said integrated circuits from said module substrate; and

permanently securing said integrated circuits to a second module substrate.

9. A method of making an electronics module, where said electronics module is to operate at one of a predetermined plurality of operating speeds, said method comprising:

providing a plurality of integrated circuits;

testing each of said integrated circuits to determine a maximum of said operating speeds at which each of said integrated circuits is capable of operating;

sorting said integrated circuits into groups in accordance with said operating speeds;

determining which of said groups includes sufficient integrated circuits for at least one electronics module;

selecting one of said determined groups that corresponds to a highest operating speed of said groups determined at said step of determining which of said groups includes sufficient integrated circuits for at least one electronics module;

assembling an electronics module by demountably attaching integrated circuits from said selected group to a module substrate;

testing said demountably assembled module at an operating speed corresponding to said selected group;

if said module fails said testing at said operating speed:

removing at least one of said integrated circuits determined to have caused said failure from said module substrate,

replacing said at least one removed integrated circuit with another integrated circuit from said selected group, and

repeating said testing step at said operating speed and, if said module again fails said testing, repeating said removing, replacing, and repeating steps.

10. The method of claim 9 , further comprising returning said at least one removed integrated circuit to said integrated circuit groups in accordance with a downgraded maximum operating speed.

11. The method of claim 9 , wherein sorting said integrated circuits into groups in accordance with said operating speeds comprises sorting based on actual tested speed without a guard band.

12. The method of claim 9 , wherein sorting said integrated circuits into groups in accordance with said operating speeds comprises sorting with a guard band of less than 10 MHz.

13. The method of claim 9 , further comprising permanently attaching said integrated circuits to said module substrate if said module passes said testing at said operating speed.

14. The method of claim 9 , further comprising:

if said module passes said testing at said operating speed:

removing said integrated circuits from said module substrate; and

permanently securing said integrated circuits to a second module substrate.

15. A method of making an electronics module, where said electronics module is to operate at one of a predetermined plurality of operating speeds, said method comprising:

providing a plurality of integrated circuits;

testing each of said integrated circuits to determine a maximum of said operating speeds at which each of said integrated circuits is capable of operating;

sorting said integrated circuits into groups in accordance with said operating speeds wherein each of said operating speeds is assigned a priority;

determining which of said groups includes sufficient integrated circuits for at least one electronics module;

selecting one of said determined groups that corresponds to a highest of said assigned priorities among said groups determined at said step of determining which of said groups includes sufficient integrated circuits for at least one electronics module;

assembling an electronics module by demountably attaching integrated circuits from said selected group to a module substrate;

testing said demountably assembled module at an operating speed corresponding to said selected group;

if said module fails said testing at said operating speed:

removing at least one of said integrated circuits determined to have caused said failure from said module substrate,

replacing said at least one removed integrated circuit with another integrated circuit from said selected group, and

repeating said testing step at said operating speed and, if said module again fails said testing, repeating said removing, replacing, and repeating steps.

16. The method of claim 15 , further comprising returning said at least one removed integrated circuit to said integrated circuit groups in accordance with a downgraded maximum operating speed.

17. The method of claim 15 , wherein sorting said integrated circuits into groups in accordance with said operating speeds comprises sorting based on actual tested speed without a guard band.

18. The method of claim 15 , wherein sorting said integrated circuits into groups in accordance with said operating speeds comprises sorting with a guard band of less than 10 MHz.

19. The method of claim 15 , further comprising permanently attaching said integrated circuits to said module substrate if said module passes said testing at said operating speed.

20. The method of claim 15 , further comprising:

if said module passes said testing at said operating speed:

removing said integrated circuits from said module substrate; and

permanently securing said integrated circuits to a second module substrate.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2025
From: HSBC BANK USA, NATIONAL ASSOCIATION
To: FORMFACTOR, INC.
Reel/Frame 072853/0001 →
SECURITY INTEREST Recorded Jul 29, 2025
From: FORMFACTOR, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 072263/0272 →
SECURITY INTEREST IN UNITED STATES PATENTS AND TRADEMARKS Recorded Jul 12, 2016
From: FORMFACTOR, INC.; ASTRIA SEMICONDUCTOR HOLDINGS, INC.; CASCADE MICROTECH, INC.; MICRO-PROBE INCORPORATED
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 039184/0280 →