IP Library Granted Patent US 7,675,465
Granted Patent B2
US 7,675,465 · App. 11/752,083 · Granted Mar 9, 2010

Surface mountable integrated circuit packaging scheme

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,675,465
App. No.
11/752,083
Granted
Mar 9, 2010
Kind
B2
Abstract

An integrated circuit (IC) package is disclosed. The IC package includes a substrate having top, middle and bottom layers, an array of millimeter-wave antennas embedded on the top layer of the substrate and a monolithic microwave integrated circuit (MMIC) mounted on the bottom layer of the substrate. In one embodiment, the second level interconnect for surface-mounting on a printed circuit board (PCB) is provided on the bottom layer of the substrate.

Claims (36)

1. An integrated circuit (IC) package comprising:

a substrate having first, second and third sets of one or more layers, including:

an array of millimeter-wave antennas embedded the first set of layers of the substrate, comprising:

first antennas embedded on a first layer of the first set of layers;

second antennas embedded on a second layer of the first set of layers;

a monolithic microwave integrated circuit (MMIC) mounted on one of the third set of layers of the substrate; and

ball grid array (BGA) balls mounted on the third set of layers to mount the substrate to a printed circuit board.

2. The package of claim 1 wherein the MMIC comprises one or more ports corresponding to an antenna in the array.

3. The package of claim 2 further comprising antenna feed points embedded in one or more of the second set of layers of the substrate.

4. The package of claim 3 further comprising an interconnection to carry signal from the MMIC to the feed points.

5. The package of claim 4 wherein the interconnection comprises a compensation structure to reduce the parasitic effect of the transition from a layer in the third set of layers through to the second set of layers.

6. The package of claim 4 further comprising analog signal lines embedded in third set of layers.

7. The package of claim 6 further comprising leads mounted on the third set of layers to mount the substrate to a printed circuit board (PCB).

8. The package of claim 6 further comprising a pad mounted underneath the MMIC die to mount on the PCB.

9. The package of claim 8 wherein the backside of the MMIC die is metalized.

10. A system comprising:

an integrated circuit (IC) package comprising:

a substrate having first, second and third sets of one or more layers, including:

an array of millimeter-wave antennas embedded the first set of layers of the substrate, comprising:

first antennas embedded on a first layer of the first set of layers;

second antennas embedded on a second layer of the first set of layers; and

a monolithic microwave integrated circuit (MMIC) mounted on one of the third set of layers of the substrate;

a printed circuit board (PCB) mounted on the third set of layers of the substrate; and

ball grid array (BGA) balls mounted on the third set of layers to mount the substrate to a printed circuit board.

11. The system of claim 10 wherein the MMIC comprises one or more ports corresponding to an antenna in the array.

12. The system of claim 11 wherein the package further comprises antenna feed points embedded in the one or more of second set of layers of the substrate.

13. The system of claim 12 further comprising an interconnection to carry signal from the MMIC to the feed points.

14. The system of claim 10 further comprising leads mounted on at least one of the third set of layers to mount the substrate to a the PCB.

15. An integrated circuit (IC) package comprising:

a substrate having first, second and third sets of one or more layers, including:

an array of millimeter-wave antennas embedded on the first set of layers of the substrate;

a monolithic microwave integrated circuit (MMIC) mounted on one of the third set of layers of the substrate; and

a ball grid away (BGA) balls mounted on the third set of layers to mount the substrate to a printed circuit board (PCB).

16. The package of claim 15 wherein the substrate further comprises a first ground plane embedded between the first and second sets of one or more layers and a second ground plane embedded between the second and third sets of one or more layers.

17. The package of claim 16 wherein the first and second ground planes shield the circuitry in the first, second and third sets of layers from the other layers.

18. The package of claim 15 further comprising antenna feed points embedded in one or more of the second set of layers of the substrate.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded May 21, 2019
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 049827/0326 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2017
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.
To: QUALCOMM INCORPORATED
Reel/Frame 041905/0814 →
RELEASE OF SECURITY INTEREST Recorded Mar 7, 2017
From: JEFFERIES FINANCE LLC
To: LATTICE SEMICONDUCTOR CORPORATION; SILICON IMAGE, INC.; SIBEAM, INC.; DVDO, INC.
Reel/Frame 041905/0860 →
SECURITY INTEREST Recorded Mar 19, 2015
From: LATTICE SEMICONDUCTOR CORPORATION; SIBEAM, INC.; SILICON IMAGE, INC.; DVDO, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 035226/0289 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2007
From: DOAN, CHINH HUY; ALI, MOHAMMED ERSHAD
To: SIBEAM, INC.
Reel/Frame 019350/0204 →