Method for manufacturing semiconductor device
View Patent ↗A method of manufacturing a semiconductor device in which a source contact plug and a drain contact plug are formed. The method includes the steps of etching part of the semiconductor substrate to form a step, thus forming an overlay vernier, and forming a hard mask on the step so that the step is maintained.
1. A method of manufacturing a semiconductor device, including a semiconductor substrate, which includes a real cell region and a scribe line region, the method comprising:
etching parts of the semiconductor substrate to form a step in the semiconductor substrate of the scribe line region and to form a source contact hole in the real cell region;
forming a conductive layer on the entire surface including the semiconductor substrate so that the shape of the step in the scribe line region is maintained and the source contact hole in the real cell region is filled;
performing a chemical mechanical polishing process to form a source contact plug in the real cell region;
forming an insulating layer on the entire surface including the conductive layer so that the shape of the step in the scribe line region is maintained; and
forming a hard mask on the insulating layer to form a drain contact plug in the real cell region so that the shape of the step in the scribe line region is maintained,
wherein the step in the scribe line region is used as an overlay vernier when the drain contact plug is formed.
2. The method of claim 1 , wherein the hard mask is formed from an opaque material through which light cannot pass.
3. The method of claim 2 , wherein the hard mask includes an amorphous carbon layer.
4. The method of claim 1 , wherein the step in the scribe line region is used as an overlay vernier when the source contact plug is formed.
5. The method of claim 1 , further comprising forming an etch-stop layer on the semiconductor substrate including the real cell region and the scribe line region, before etching parts of the semiconductor substrate.