Phase change memory device and method for fabricating the same
A phase change memory device is provided. The phase change memory device includes a substrate comprising a stacked structure. The stacked structure comprises a plurality of insulating layers and conductive layers. Any two of the conductive layers are spaced apart by one of the conductive layers. A first electrode structure with a first sidewall and a second sidewall is formed on the stacked structure. A plurality of heating electrodes is placed on the conductive layers and adjacent to the first sidewall and the second sidewall of the first electrode structure. A pair of phase change material spacers is placed on the first sidewall and the second sidewall of the first electrode structure. The phase change material sidewalls cover the plurality of heating electrodes.
1. A phase change memory device, comprising:
a substrate comprising a stacked structure, the stacked structure comprises a plurality of insulating layers and conductive layers, wherein any two of the adjacent conductive layers of the stacked structure are spaced apart by one of the insulating layers;
a first electrode structure with a first sidewall and a second sidewall formed on the stacked structure;
a plurality of heating electrodes placed on the conductive layers and adjoining the first sidewall and the second sidewall of the first electrode structure;
a pair of phase change material spacers placed on the first sidewall and the second sidewall of the first electrode structure covering the plurality of heating electrodes.
2. The phase change memory device as claimed in claim 1 , wherein the insulating layers and conductive layers of the stacked structure are horizontally stacked.
3. The phase change memory device as claimed in claim 2 , further comprising:
a first trench formed in the stacked structure to expose the insulating layers and conductive layers of the stacked structure.
4. The phase change memory device as claimed in claim 3 , wherein the first trench has a third sidewall and a fourth sidewall with an angle θ 3 of 15° to 75° between the third sidewall and the substrate and an angle θ 4 of 15° to 75° between the fourth sidewall and the substrate.
5. The phase change memory device as claimed in claim 4 , wherein the angle θ 3 is equal to the angle θ 4 .
6. The phase change memory device as claimed in claim 4 , wherein the angle θ 3 is different from the angle θ 4 .
7. The phase change memory device as claimed in claim 1 , wherein the substrate further comprises a second trench, the insulating layers and conductive layers of the stacked structure are stacked vertically in the second trench, and the stacked structure is substantially coplanar to the substrate.
8. The phase change memory device as claimed in claim 7 , wherein the second trench has a fifth sidewall and a sixth sidewall with an angle θ 5 of 15° to 75° between the fifth sidewall and the substrate and an angle θ 6 of 15° to 75° between the sixth sidewall and the substrate.
9. The phase change memory device as claimed in claim 8 , wherein the angle θ 5 is equal to the angle θ 6 .
10. The phase change memory device as claimed in claim 8 , wherein the angle θ 5 is different from the angle θ 6 .
11. The phase change memory device as claimed in claim 1 , wherein the conductive layer is a p-type doped polysilicon layer.
12. The phase change memory device as claimed in claim 1 , wherein the first electrode structure is a composite layer comprising an oxide layer, a polysilicon layer and a metal silicide layer.
13. The phase change memory device as claimed in claim 12 , wherein the metal silicide layer comprises nitrided metal silicide.
14. The phase change memory device as claimed in claim 12 , wherein the polysilicon layer is a p-type or n-type doped polysilicon layer.
15. The phase change memory device as claimed in claim 12 , wherein the polysilicon layer is separated form the heating electrode by the oxide layer.
16. The phase change memory device as claimed in claim 1 , wherein the heating electrode comprises metal silicide, nitrided metal silicide or combination thereof.
17. The phase change memory device as claimed in claim 1 , further comprising:
a bipolar junction transistor formed in the conductive layer by doping impurities, the bipolar junction transistor is adjacent to a surface of the conductive layer and the second sidewall of the first electrode structure.