Method of manufacturing NPN device
View Patent ↗A method of forming a semiconductor device is disclosed. The method includes providing a floor for a semiconductor device by utilizing a CMOS process. The method further includes providing a BiCMOS-like process on top of the floor to further fabricate the semiconductor device, wherein the BiCMOS-like process and the CMOS process provides the semiconductor device.
1. A method of forming a semiconductor device comprising:
blanket implanting a first plurality of dopants into a substrate to form a buried
layer, wherein a masking step is not utilized to form the buried layer;
growing an epitaxial layer on the buried layer;
implanting a second plurality of dopants into a first portion of the epitaxial layer to form a first well region within the epitaxial layer;
implanting a third plurality of dopants into a second portion of the epitaxial layer to form a second well adjacent to the first well within the epitaxial layer;
forming a base region in a top portion of the first well region;
forming an emitter terminal within the base region and a collector terminal within the first well region adjacent to the base region; and
forming a base terminal within the base region and adjacent to the emitter terminal,
wherein the first plurality of dopants include a plurality of p-type dopants, the second plurality of dopants include a plurality of n-type dopants,
and the third plurality of dopants include a plurality of p-type dopants.
2. A method of forming a semiconductor device comprising:
blanket implanting a first plurality of dopants into a substrate to form a buried
layer, wherein a masking step is not utilized to form the buried layer;
growing an epitaxial layer on the buried layer;
implanting a second plurality of dopants into a first portion of the epitaxial layer to form a first well region within the epitaxial layer;
implanting a third plurality of dopants into a second portion of the epitaxial layer to form a second well adjacent to the first well within the epitaxial layer;
forming a base region in a tor portion of the first well region;
forming an emitter terminal within the base region and a collector terminal within the first well region adjacent to the base region; and
forming a base terminal within the base region and adjacent to the emitter terminal,
wherein the base region is a p-type base region.
3. A method of forming a semiconductor device comprising:
blanket implanting a first plurality of dopants into a substrate to form a buried
layer, wherein a masking strep is not utilized to form the buried layer;
growing an epitaxial layer on the buried layer;
implanting a second plurality of dopants into a first portion of the epitaxial layer to form a first well region within the epitaxial layer;
implanting a third plurality of dopants into a second portion of the epitaxial layer to form a second well adjacent to the first well within the epitaxial layer;
forming a base region in a tor portion of the first well region;
forming an emitter terminal within the base region and a collector terminal within the first well region adjacent to the base region; and
forming a base terminal within the base region and adjacent to the emitter terminal,
wherein the semiconductor device is a NPN device.
4. A method of forming a NPN device comprising:
blanket implanting a plurality of p-type dopants into a p-type substrate to form a
P+ buried layer, wherein a masking step is not utilized to form the P+ buried layer;
growing an epitaxial layer on the P+ buried layer;
implanting a plurality of n-type dopants into a first portion of the epitaxial layer to form a n-well region within the epitaxial layer;
implanting a plurality of p-type dopants into a second portion of the epitaxial layer adjacent to the n-well to form a p-well region within the epitaxial layer;
forming a p-type base region in a top portion n-well region;
forming an emitter terminal within the p-type base region and a collector terminal within the n-well adjacent to the base; and
forming a base terminal within the p-type base region and adjacent to the emitter terminal.
5. The method of claim 4 , wherein the P+ buried layer extends 2.5 microns into the p-type substrate.
6. The method of claim 4 , wherein the concentration of n-type dopants in the N− epitaxial layer is approximately 1×10 16 atoms/cm 3 .