IP Library Granted Patent US 7,656,139
Granted Patent B2
US 7,656,139 · App. 11/764,758 · Granted Feb 2, 2010

Creating additional phase margin in the open loop gain of a negative feedback amplifier system using a boost zero compensating resistor

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Quick Facts
Patent No.
US 7,656,139
App. No.
11/764,758
Granted
Feb 2, 2010
Kind
B2
Abstract

A low-dropout voltage (LDO) regulator that creates a zero in the open loop gain using a relatively small-sized current control element to divert part of the supplied load current through a “zero” resistor before adding it to the output load. The main part of the output load is passed through a relatively large second current control element. A control signal generated by an error amplifier (e.g., an op-amp) is used to control the small current control element, but is passed through a boost zero compensating resistor before being applied to the large current control element. The voltage signal developed across the “zero” resistor mimics the magnitude and phase of a zero in the loop. This voltage signal is added to the loop gain by, for instance, using a bypass capacitor, and the resulting feedback signal is supplied to the error amplifier.

Claims (50)

1. A negative feedback amplifier system comprising:

a first current control element having a first terminal connected to a supply voltage, a control terminal, and a second terminal connected to an output terminal;

an output stabilization circuit including:

a second current control element having a first terminal connected to the voltage supply, a control terminal, and a second terminal, and

a first resistor coupled between the second terminal of the second current control element and the output terminal;

an amplifier having at least one input terminal coupled to the second terminal of the second current control element, the amplifier also having an output terminal connected to the control terminals of the second current control element; and

a boost zero compensating resistor connected between the output terminal of the amplifier and the input terminal of the first current control element.

2. The negative feedback amplifier system according to claim 1 , wherein the boost zero compensating resistor has a resistance that is greater than 100 Ohm.

3. The negative feedback amplifier system according to claim 1 , wherein each of the first and second current control elements comprises one of a P-type MOSFET transistor, an N-type MOSFET, a PNP-type bipolar transistor, and an NPN-type bipolar transistor.

4. The negative feedback amplifier system according to claim 3 , wherein a ratio of a size of the second transistor to a size of the first transistor is smaller than one.

5. The negative feedback amplifier system according to claim 1 , wherein the output stabilization circuit further comprises a high pass filter coupled between the second terminal of the second current control element and the input terminal of the amplifier.

6. The negative feedback amplifier system according to claim 5 , further comprising a feedback block coupled between the second terminal of the second current control element and the input terminal of the amplifier.

7. The negative feedback amplifier system according to claim 6 , further comprising a summing circuit having at least one input terminal coupled to the high pass filter, to the feedback block, and to and reference voltage source, and an output terminal connected to a first input terminal of the amplifier.

8. The negative feedback amplifier system according to claim 5 , wherein the high pass filter comprises a bypass capacitor.

9. A low dropout voltage (LDO) regulator having an input terminal and an output terminal, the LDO regulator comprising:

a first current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal connected to the output terminal;

an output stabilization circuit including:

a second current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal, and

a first resistor coupled between the second terminal of the second current control element and the output terminal; and

an error amplifier having a first input terminal coupled to the output stabilization circuit, a second input terminal connected to a reference voltage source, and an output terminal connected to the control terminals of the second current control element; and

a boost zero compensating resistor connected between the output terminal of the error amplifier and the input terminal of the first current control element.

10. The negative feedback amplifier system according to claim 9 , wherein the boost zero compensating resistor has a resistance that is greater than 100 Ohm.

11. The LDO regulator according to claim 9 , wherein each of the first and second current control elements comprises one of a P-type MOSFET transistor, an N-type MOSFET, a PNP-type bipolar transistor, and an NPN-type bipolar transistor.

12. The LDO regulator according to claim 11 , wherein a ratio of a size of the second transistor to a size of the first transistor is smaller than one.

13. The LDO regulator according to claim 9 , wherein the output stabilization circuit further comprises a feedback capacitor having a first terminal connected to the second terminal of the second current control element, and a second terminal connected to the first input terminal of the error amplifier.

14. The LDO regulator according to claim 9 ,

wherein the error amplifier comprises an operational amplifier,

wherein the first input terminal comprises an non-inverting input terminal of the operational amplifier, and

wherein the second input terminal comprises a inverting input terminal of the operational amplifier.

15. A portable device comprising:

a power source for generating an input signal;

a load circuit; and

a voltage regulator having an input terminal connected to the power source and an output terminal connected to the load circuit, wherein the voltage regulator comprises:

a first current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal connected to the output terminal;

an output stabilization circuit including:

a second current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal, and

a first resistor coupled between the second terminal of the second current control element and the output terminal;

an error amplifier having a first input terminal coupled to the output stabilization circuit, a second input terminal connected to a reference voltage source, and an output terminal connected to the control terminals of the second current control element; and

a boost zero compensating resistor connected between the output terminal of the error amplifier and the input terminal of the first current control element.

16. The portable device according to claim 15 , wherein the boost zero compensating resistor has a resistance that is greater than 100 Ohm.

17. The portable device according to claim 15 , wherein each of the first and second current control elements comprises one of a P-type MOSFET transistor, an N-type MOSFET, a PNP-type bipolar transistor, and an NPN-type bipolar transistor.

18. The portable device according to claim 17 , wherein a ratio of a size of the second transistor to a size of the first transistor is smaller than one.

19. The portable device according to claim 15 , wherein the output stabilization circuit further comprises a feedback capacitor having a first terminal connected to the second terminal of the second current control element, and a second terminal coupled to the first input terminal of the error amplifier.

20. The portable device according to claim 19 , further comprising a feedback block including a first resistor connected in series with a second resistor between the output terminal and a fixed voltage source, wherein a node located between the first and second resistors is connected to the first input terminal of the error amplifier.

21. The portable device according to claim 15 ,

wherein the error amplifier comprises an operational amplifier,

wherein the first input terminal comprises an non-inverting input terminal of the operational amplifier, and

wherein the second input terminal comprises a inverting input terminal of the operational amplifier.

22. The portable device according to claim 15 , wherein the portable device comprises one of a cellular phone, a cordless phone, a pager, a personal digital assistant, a portable personal computer, a camcorder, and a digital camera.

23. The portable device according to claim 15 , wherein the load circuit and the voltage regulator are integrally fabricated on a single semiconductor substrate.

Assignments (11)
INTELLECTUAL PROPERTY BUY-IN AGREEMENT/ASSIGNMENT Recorded Apr 4, 2023
From: MICREL LLC
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 063241/0771 →
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2010
From: GATER, CHRISTIAN; WILSON, PAUL
To: MICREL, INCORPORATED
Reel/Frame 024588/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2007
From: VAN ETTINGER, ROEL
To: MICREL, INCORPORATED
Reel/Frame 019445/0452 →