Semiconductor device and method of manufacturing the same
View Patent ↗A conventional semiconductor device, for example, a MOS transistor including an offset gate structure has a problem that it is difficult to reduce the device size. In a semiconductor device according to the present invention, for example, in a P-channel MOS transistor including an offset gate structure, a LOCOS oxide film is formed between a source region and a drain region in an N type epitaxial layer. A gate electrode is formed to be positioned on the LOCOS oxide layer. In addition, a P type diffusion layer as the drain region and a P type diffusion layer as the source region are formed with a high positional accuracy with respect to the gate electrode. This structure makes it possible to reduce the device size of the MOS transistor.
1. A semiconductor device comprising:
a semiconductor layer;
drain regions, a source region and a back gate region, which are formed in the semiconductor layer;
a gate oxide film formed on the semiconductor layer; and
a gate electrode formed on the gate oxide film,
wherein the drain regions are disposed separately at respective sides of the back gate region, and
the separation distance between a first one of the drain regions and the source region is the substantially same as the separation distance between a second one of the drain regions and the source region.
2. The semiconductor device according to claim 1 , wherein
the gate electrode is formed of a polysilicon film and a tungsten silicon film, and
the tungsten silicon film has a thickness greater than that of the polysilicon film.
3. The semiconductor device according to claim 1 , wherein
a thermal oxide film is formed in the semiconductor layer, and the thermal oxide film is a LOCOS oxide film formed by means of a LOCOS method.