Granted Patent B2

US 7,560,988 · App. 11/779,207 · Granted Jul 14, 2009

Abstract

Claims (42)

1. An integrated circuit system comprising:

forming a differential pair;

reducing a mismatch in the differential pair by:

coupling an amplifier to the differential pair; and

coupling a local feedback network to the amplifier in which referencing the local feedback network includes: forming a first resistor for providing a feedback path to the amplifier, coupling a second resistor to the amplifier and the first resistor for providing a reference from a second voltage, and coupling a third resistor to the amplifier, the first resistor, and the second resistor for providing the reference from a first voltage; and

driving an output transistor by the amplifier.

2. The system as claimed in claim 1 further comprising coupling a buffering transistor between the differential pair and the output transistor.

3. The system as claimed in claim 1 wherein coupling the local feedback network includes coupling a buffering transistor.

4. The system as claimed in claim 1 further comprising assembling an electronic system having the integrated circuit system.

5. An integrated circuit system comprising:

forming a differential pair on a semiconductor substrate;

reducing a mismatch in the differential pair by:

coupling an amplifier to the differential pair includes coupling a negative input of the amplifier; and

coupling a local feedback network to the amplifier in which referencing the local feedback network includes: forming a first resistor for providing a feedback path to the amplifier includes providing a negative feedback, coupling a second resistor to the amplifier and the first resistor for providing a reference from a second voltage, coupling a third resistor to the amplifier, the first resistor, and the second resistor for providing the reference from a first voltage; and

driving an output transistor by the amplifier.

6. The system as claimed in claim 5 further comprising coupling a buffering transistor between the differential pair and the output transistor for driving the output transistor.

7. The system as claimed in claim 5 in which coupling the local feedback network includes:

establishing a DC bias for the amplifier by the first resistor, the second resistor, the third resistor, and the first voltage; and

forming a current source in the local feedback network for limiting a feedback current going to the amplifier.

8. The system as claimed in claim 5 wherein coupling the local feedback network includes coupling a buffering transistor for controlling a gate voltage on the output transistor.

9. The system as claimed in claim 5 in which forming a differential pair includes forming a current mirror, a cascode connection, or a combination thereof.

10. An integrated circuit system comprising:

a differential pair;

an amplifier, for reducing mismatch in the differential pair, coupled to the differential pair;

a local feedback network coupled to the amplifier in which the local feedback network includes:

a first resistor for providing a feedback path to the amplifier,

a second resistor coupled to the amplifier and the first resistor for providing a reference from a second voltage, and

a third resistor coupled to the amplifier, the first resistor, and the second resistor for providing the reference from a first voltage; and

an output transistor driven by the amplifier.

11. The system as claimed in claim 10 further comprising a buffering transistor between the differential pair and the output transistor.

12. The system as claimed in claim 10 wherein the local feedback network includes a buffering transistor.

13. The system as claimed in claim 10 further comprising an electronic system having the amplifier therein.

14. The system as claimed in claim 10 further comprising:

a semiconductor substrate having the differential pair formed thereon;

a negative input of the amplifier coupled to the differential pair; and

a positive input of the amplifier coupled to the local feedback network.

15. The system as claimed in claim 14 further comprising a buffering transistor between the differential pair and the output transistor for driving the output transistor.

16. The system as claimed in claim 14 in which the local feedback network includes:

a DC bias for the amplifier from the first resistor, the second resistor, the third resistor, and the first voltage; and

a current source in the local feedback network for limiting a feedback current going to the amplifier.

17. The system as claimed in claim 14 wherein the local feedback network includes a buffering transistor for controlling a gate voltage on the output transistor.

18. The system as claimed in claim 14 in which the differential pair includes a current mirror, a cascode connection, or a combination thereof.

Assignments (10)