IP Library Granted Patent US 7,804,344
Granted Patent B2
US 7,804,344 · App. 11/788,442 · Granted Sep 28, 2010

Periodic signal synchronization apparatus, systems, and methods

Assignee: Micron Technology, Inc.
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Quick Facts
Patent No.
US 7,804,344
App. No.
11/788,442
Granted
Sep 28, 2010
Kind
B2
Abstract

Apparatus, systems, and methods are disclosed that operate to generate a periodic output signal from a periodic input signal, obtain a plurality of samples of a phase difference between the output signal and the input signal, and to adjust a phase of the output signal based on the samples of the phase difference. Additional apparatus, systems, and methods are disclosed.

Claims (77)

1. A method comprising:

generating a periodic output signal from a periodic input signal generated by an oscillator;

obtaining a plurality of samples of a phase difference between the output signal and the input signal;

determining an average phase difference between the output signal and the input signal from the plurality of samples; and

adjusting a phase of the output signal based on the average phase difference.

2. A method comprising:

generating a periodic output signal from a periodic input signal;

determining an average phase difference between the output signal and the input signal over a plurality of periods of the input signal including:

generating a multi-phase clock signal having a plurality of phases, each phase of the multi-phase clock signal having a period approximately equal to a period of the input signal;

comparing each phase of the multi-phase clock signal to the input signal and the output signal;

determining a phase difference between the input signal and the output signal for each of a plurality of periods of the input signal based on the comparison with the multi-phase clock signal; and

determining an average phase difference to be an average of the phase differences determined for the plurality of periods of the input signal; and

delaying the input signal based on the average phase difference to generate the output signal.

3. A method comprising:

generating a periodic output signal from a periodic input signal;

obtaining a plurality of samples of a phase difference between the output signal and the input signal; and

adjusting a phase of the output signal based on a calculated phase difference calculated by alternately adding and subtracting succeeding samples of the phase difference.

4. A method comprising:

generating a periodic output signal from a periodic input signal;

obtaining a plurality of samples of a phase difference between the output signal and the input signal; and

adjusting a phase of the output signal based on a calculated phase difference calculated by adding or subtracting differently weighted samples of the phase difference.

5. A method comprising:

generating a periodic output signal from a periodic input signal;

obtaining a plurality of samples of a phase difference between the output signal and the input signal; and

adjusting a phase of the output signal based on a least variance approximation of the samples of the phase difference.

6. A method comprising:

generating a periodic output signal from a periodic input signal;

obtaining a plurality of samples of a phase difference between the output signal and the input signal; and

adjusting a phase of the output signal based on a least squares estimate of the samples of the phase difference.

7. A method comprising:

generating a periodic output signal from a periodic input signal;

obtaining a plurality of samples of a phase difference between the output signal and the input signal; and

adjusting a phase of the output signal based on an Nth root of a product of the samples of the phase difference.

8. A method comprising:

generating a periodic output signal from a periodic input signal;

comparing the output signal and the input signal with a selected clock signal;

measuring a phase difference between the output signal and the input signal from the comparison with the selected clock signal; and

adjusting a phase of the output signal based on the comparison of the output signal and the input signal with the selected clock signal.

9. The method of claim 8 , further comprising generating the selected clock signal as a multi-phase clock signal having a plurality of phases, each phase of the multi-phase clock signal having a period approximately equal to a period of the input signal.

10. The method of claim 8 , further comprising:

determining an average phase difference between the output signal and the input signal over a plurality of periods of the input signal, wherein adjusting a phase of the output signal includes adjusting the phase of the output signal based on the average phase difference.

11. The method of claim 8 , further comprising:

determining a calculated phase difference between the output signal and the input signal over a plurality of periods of the input signal by adding or subtracting differently weighted samples of the measured phase difference, wherein adjusting a phase of the output signal includes adjusting the phase of the output signal based on the calculated phase difference.

12. The method of claim 8 , further comprising:

calculating a least variance approximation of samples of the measured phase difference over a plurality of periods of the input signal, wherein adjusting a phase of the output signal includes adjusting the phase of the output signal based on the least variance approximation.

13. The method of claim 8 , further comprising:

determining an average phase difference between the output signal and the input signal over a plurality of periods of the input signal;

generating an up signal or a down signal on a line coupled to a charge pump in a phase lock loop (PLL) based on the average phase difference;

driving current into a loop filter in the PLL from the charge pump if the charge pump receives an up signal;

drawing current from the loop filter into the charge pump if the charge pump receives a down signal;

generating a control voltage in the loop filter based on the current received from the charge pump; and

wherein adjusting a phase of the output signal includes adjusting the phase of the output signal based on oscillations from a voltage controlled oscillator (VCO) having a frequency based on the control voltage from the loop filter.

14. The method of claim 8 , further comprising:

obtaining multiple samples of the phase difference between the output signal and the input signal over a plurality of periods of the input signal; and

converting the samples of the phase difference into digital data.

15. The method of claim 14 , further comprising:

generating an average value of the digital data;

generating an average pulse width based on the average value; and

wherein adjusting a phase of the output signal includes adjusting the phase of the output signal based on the average pulse width.

16. The method of claim 8 , further comprising:

for each of a plurality of periods of the input signal:

comparing the input signal and the output signal with a plurality of multi-phase clock signals;

for a transition of each phase of the multi-phase clock signals occurring between a transition of the input signal and a corresponding transition of the output signal, incrementing a counter, a counter being incremented for each phase of the multi-phase clock signals;

setting a maximum coarse value to be equal to a highest value in any of the counters;

setting a fine value to be equal to the number of counters having the highest value;

generating an average maximum coarse value from the maximum coarse values;

generating an average fine value from the fine values;

generating an average pulse width based on the average maximum coarse value and the average fine value; and

wherein adjusting a phase of the output signal includes adjusting the phase of the output signal based on the average pulse width.

17. An apparatus comprising:

a clock generator to generate a selected clock signal;

a phase detector having a first input coupled to receive a periodic input signal, a second input coupled to receive a periodic output signal, and an output, the phase detector to generate a phase difference signal on the output indicating a phase relationship between the input signal and the output signal;

a digital circuit coupled to the output of the phase detector to receive the phase difference signal and coupled to the clock generator to receive the selected clock signal, the digital circuit to compare the phase difference signal with the selected clock signal to generate a plurality of phase difference measurements over a plurality of periods of the input signal, and to calculate an average phase difference from an average of the phase difference measurements; and

an output circuit coupled to the digital circuit to adjust a phase of the output signal based on the average phase difference.

18. The apparatus of claim 17 , wherein the digital circuit comprises a digital signal processor.

19. The apparatus of claim 17 , wherein the clock generator comprises a multi-phase clock generator to generate a multi-phase clock signal.

20. The apparatus of claim 17 , wherein the output circuit comprises a delay lock loop.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2007
From: MA, YANTAO; WRIGHT, JEFFREY P.; PAN, DONG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 019339/0045 →
Continuity (1)
Related Publication 20080258785A1 · Oct 23, 2008