Supporting speculative modification in a data cache
View Patent ↗Method and system for supporting speculative modification in a data cache are provided and described. A data cache comprises a plurality of cache lines. Each cache line includes a state indicator for indicating anyone of a plurality of states, wherein the plurality of states includes a speculative state to enable keeping track of speculative modification to data in the respective cache line. The speculative state enables a speculative modification to the data in the respective cache line to be made permanent in response to a first operation performed upon reaching a particular instruction boundary during speculative execution of instructions. Further, the speculative state enables the speculative modification to the data in the respective cache line to be undone in response to a second operation performed upon failing to reach the particular instruction boundary during speculative execution of instructions.
1. A data cache comprising:
a plurality of cache lines, wherein a first cache line of the plurality of cache lines includes a state indicator for indicating at least one of a plurality of states, wherein the plurality of states includes a speculative state configured to track a speculative modification to data in the first cache line, and wherein the speculative state enables the speculative modification to the data in the first cache line to be undone in response to an operation performed responsive to not reaching an instruction boundary during speculative execution of instructions; and
wherein said data cache is controllable to evict a particular cache line of said plurality of cache lines to a speculative cache buffer, and wherein said speculative cache buffer comprises at least one state indicator corresponding to at least one cache line of said speculative cache buffer.
2. The data cache of claim 1 , wherein the plurality of states further includes an invalid state, a dirty state, and a valid state.
3. The data cache of claim 1 , wherein the speculative state enables the speculative modification to the data in the first cache line to be made permanent in response to a second operation, wherein the second operation is a commit operation.
4. The data cache of claim 1 , wherein the operation is a rollback operation.
5. The data cache of claim 1 , wherein the first cache line is cleaned, before the speculative modification to the data in the first cache line, by writing back dirty data of the first cache line to a second memory component.
6. A system comprising:
a data cache including a plurality of cache lines, wherein a first cache line of the plurality of cache lines includes a state indicator for indicating at least one of a plurality of states, wherein the plurality of states includes a speculative state configured to track a speculative modification to data in the first cache line, and wherein the speculative state enables the speculative modification to the data in the first cache line to be undone in response to an operation performed responsive to not reaching an instruction boundary during speculative execution of instructions; and
a speculative cache buffer controllable to receive cache lines evicted from said data cache, and wherein said speculative cache buffer comprises at least one state indicator corresponding to at least one cache line of said speculative cache buffer.
7. The system of claim 6 , wherein the plurality of states further includes an invalid state, a dirty state, and a valid state, and wherein the second plurality of states includes the speculative state and the dirty state.
8. The system of claim 6 , wherein the speculative state enables the speculative modification to the data in the first cache line to be made permanent in response to a second operation, and wherein the second operation is a commit operation.
9. The system of claim 6 , wherein the operation is a rollback operation.
10. The system of claim 6 , wherein the first cache line is evicted to the speculative cache buffer before the speculative modification to the data in the first cache line.
11. The system of claim 6 , wherein the second plurality of states includes a commit-kill state.
12. The system of claim 6 , wherein the speculative cache buffer is fully associative.
13. A system comprising:
a data cache including a plurality of cache lines, wherein a first cache line of the plurality of cache lines includes a state indicator for indicating at least one of a plurality of states, wherein the plurality of states includes a speculative state configured to track a speculative modification to data in the first cache line, wherein the speculative state enables the speculative modification to the data in the first cache line to be undone in response to an operation performed responsive to not reaching an instruction boundary during speculative execution of instructions, wherein said data cache is controllable to evict a particular cache line of said plurality of cache lines to a speculative cache buffer, and wherein said speculative cache buffer comprises at least one state indicator corresponding to at least one cache line of said speculative cache buffer; and
a processor configured to perform a speculative store operation to the data cache.
14. The system of claim 13 , wherein the speculative state enables the speculative modification to the data in the first cache line to be made permanent in response to a second operation, and wherein the second operation is a commit operation.
15. The system of claim 13 , wherein the operation is a rollback operation.
16. The system of claim 13 , wherein the first cache line is cleaned, before the speculative modification to the data in the first cache line, by writing back dirty data of the first cache line to a second memory component.
17. The system of claim 13 further comprising said speculative cache buffer configured to receive evicted cache lines, wherein the evicted cache lines are evicted from the data cache and are associated with one of a second plurality of states.
18. The system of claim 17 , wherein the plurality of states further includes an invalid state, a dirty state, and a valid state, and wherein the second plurality of states includes the speculative state and said dirty state.
19. The system of claim 17 , wherein the first cache line is evicted to the speculative cache buffer before the speculative modification to the data in the first cache line.
20. The system of claim 17 , wherein the second plurality of states includes a commit-kill state.
21. The system of claim 17 , wherein the speculative cache buffer is fully associative.
22. A method comprising:
in response to a speculative modification to data in a cache line, setting a state indicator of said cache line to a speculative state;
if the speculative modification to the data is requested to be undone, changing the state indicator of the cache line to a first state in response to an operation performed responsive to not reaching an instruction boundary during speculative execution of instructions; and
evicting said cache line to a speculative cache buffer, wherein said speculative cache buffer comprises at least one state indicator corresponding to at least one cache line of said speculative cache buffer.
23. The method of claim 22 further comprising: if the speculative modification to the data is requested to be made permanent, changing the state indicator to a second state in response to a second operation.
24. The method of claim 23 , wherein the first state is an invalid state, and wherein said second state is a dirty state.
25. The method of claim 23 , wherein the second operation is a commit operation.
26. The method of claim 22 , wherein the operation is a rollback operation.
27. The method of claim 22 further comprising:
cleaning the cache line, before the speculative modification to the data in the first cache line, by writing back to memory dirty data of the cache line.
28. A method comprising:
receiving at a speculative cache buffer a cache line which is evicted from a data cache, wherein data of the cache line includes a speculative modification;
setting a state indicator of the cache line to a speculative state in the speculative cache buffer; and
if the speculative modification to the data is requested to be undone, changing the state indicator of the cache line to a first state in the speculative cache buffer in response to an operation performed responsive to not reaching an instruction boundary during speculative execution of instructions.
29. The method of claim 28 further comprising:
if the speculative modification to the data is requested to be made permanent, changing the state indicator to a second state in response to a second operation.
30. The method of claim 29 , wherein the first state is an invalid state, and wherein said second state is a dirty state.
31. The method of claim 29 , wherein the second operation is a commit operation.
32. The method of claim 28 , wherein the operation is a rollback operation.
33. A method of comprising:
in response to a speculative modification of data in a cache line within a data cache, receiving at a speculative cache buffer the cache line which is evicted from the data cache;
setting a state indicator of the cache line to a commit-kill state in the speculative cache buffer; and
if the speculative modification to the data is requested to be undone, changing the state indicator of the cache line to a first state in the speculative cache buffer in response to an operation performed responsive to not reaching an instruction boundary during speculative execution of instructions.
34. The method of claim 33 further comprising:
if the speculative modification to the data is requested to be made permanent, changing the state indicator to a second state in response to a second operation.
35. The method of claim 34 , wherein the first state is a dirty state, and wherein the second state is an invalid state.
36. The method of claim 34 , wherein the second operation is a commit operation.
37. The method of claim 33 , wherein the operation is a rollback operation.