IP Library Granted Patent US 8,045,950
Granted Patent B2
US 8,045,950 · App. 11/808,416 · Granted Oct 25, 2011

Mixer circuit, receiving circuit, transmitting circuit, and method for operating a mixer circuit

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Quick Facts
Patent No.
US 8,045,950
App. No.
11/808,416
Granted
Oct 25, 2011
Kind
B2
Abstract

A mixing circuit is provided that includes a charge circuit, an oscillating circuit inlet step which is connected to a circuit which feeds an oscillating signal, and a signal inlet step. The oscillating circuit inlet step comprises at least two bipolar-transistors and the emitters thereof are connected to a constant potential which is independent from the oscillating signal. The mixing circuit is used, preferably, in a base station or a mobile radio device of a cellular radio network.

Claims (30)

1. A mixer circuit comprising:

a load circuit;

an oscillator circuit input stage that is operatively connected to a circuit that generates an oscillating signal; and

a signal input stage configured to receive an input signal to be mixed with the oscillating signal,

wherein the oscillator circuit input stage has at least two bipolar transistors, whose bases are operatively connected to the circuit emitting the oscillating signal, whose emitters are operatively connected to a constant voltage that is independent of the oscillating signal, and

wherein the circuit is configured to temporarily turn off a current to the mixer circuit by switching off both of the two bipolar transistors based on the oscillating signal.

2. The mixer circuit according to claim 1 , wherein the oscillator circuit input stage is designed such that the bipolar transistors are temporarily driven into saturation as a function of the oscillating signal.

3. The mixer circuit according to claim 1 , wherein the oscillator circuit input stage has exactly two bipolar transistors or exactly two bipolar transistor arrays, wherein each bipolar transistor array has exclusively individual bipolar transistors connected in parallel.

4. A mixer circuit comprising:

a load circuit;

an oscillator circuit input stage, which is operatively connected to a circuit that generates an oscillating signal; and

a signal input stage configured to receive an input signal to be mixed with the oscillating signal;

wherein the oscillator circuit input stage has at least two field-effect transistors whose gate connections are operatively connected to the circuit emitting the oscillating signal, whose source connections are connected to a constant voltage that is independent of the oscillating signal, and

wherein the circuit is configured to temporarily turn off a current to the mixer circuit by switching off both of the two field-effect transistors based on the oscillating signal.

5. The mixer circuit according to claim 4 , wherein the oscillator circuit input stage is designed such that the field-effect transistors are temporarily driven into the resistive region as a function of the oscillating signal.

6. The mixer circuit according to claim 4 , wherein the oscillator circuit input stage has exactly two field-effect transistors or exactly two field-effect transistor arrays, wherein each field-effect transistor array has exclusively individual field-effect transistors connected in parallel.

7. The mixer circuit according to claim 4 , wherein the signal input stage has at least two differential amplifiers, wherein each differential amplifier is operatively connected to a transistor of the signal input stage and to a load circuit.

8. The mixer circuit according to claim 7 , wherein the differential amplifiers have negative feedback, preferably negative current feedback.

9. The mixer circuit according to claim 4 , wherein the oscillator circuit input stage is connected to a driver.

10. A transmitting circuit comprising:

a mixer circuit, the mixer circuit comprising:

a load circuit;

an oscillator circuit input stage that is operatively connected to a circuit that generates an oscillating signal, the circuit temporarily turning off a current to the mixer circuit in dependence of the oscillator signal; and a signal input stage configured to receive an input signal to be mixed,

wherein the oscillator circuit input stage has at least two transistors that are operatively connected to the circuit emitting the oscillating signal, whose emitters are operatively connected to a constant voltage that is independent of the oscillating signal, and

wherein the circuit emitting the oscillating signal is designed to turn on the two transistors of the oscillator circuit input stage in a time-offset manner as a function of the oscillating signal.

11. The transmitting circuit according to claim 10 , wherein the circuit for emitting the oscillating signal is designed to temporarily, simultaneously switch off the transistors of the oscillator circuit input stage.

12. The transmitting circuit according to claim 10 , wherein the circuit emitting the oscillating signal is designed to turn on the two transistors of the oscillator circuit input stage in a time-offset manner as a function of the oscillating signal.

13. The transmitting circuit according to claim 12 , wherein the circuit for emitting the oscillating signal is designed to temporarily, and simultaneously switch off the transistors of the oscillator circuit input stage.

14. The mixer circuit according to claim 1 , wherein the mixer circuit is a mixer circuit for a base station or a mobile radio unit of a cellular radio network.

15. The transmitter according to claim 10 , wherein the two transistors are bipolar transistors or field-effect transistors.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2011
From: ATMEL AUTOMOTIVE GMBH
To: ATMEL CORPORATION
Reel/Frame 025899/0710 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2009
From: ATMEL GERMANY GMBH
To: ATMEL AUTOMOTIVE GMBH
Reel/Frame 023205/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2007
From: KARTHAUS, UDO
To: ATMEL GERMANY GMBH
Reel/Frame 019599/0969 →