IP Library Granted Patent US 7,723,202
Granted Patent B2
US 7,723,202 · App. 11/825,335 · Granted May 25, 2010

Method for manufacturing a semiconductor device including a crown-type capacitor

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Quick Facts
Patent No.
US 7,723,202
App. No.
11/825,335
Granted
May 25, 2010
Kind
B2
Abstract

A method for forming a semiconductor device includes a plurality of crown-type capacitors in a capacitor-receiving insulating film, wherein bottom electrodes of the capacitors have an insulating spacer between each two of the bottom electrodes. The insulating spacer is formed by removing a hard mask used as an etching mask for forming cylindrical holes receiving therein capacitors including the bottom electrodes.

Claims (18)

1. A method for manufacturing a semiconductor device comprising:

forming a first insulating film overlying a semiconductor substrate;

forming a mask pattern on said first insulating film;

anisotropic-etching said first insulating film by using said mask pattern as an etching mask, to form a plurality of through-holes in said first insulating film;

depositing a bottom electrode film on bottom and sidewall of said plurality of through-holes and on top of said mask pattern;

depositing a second insulating film on said bottom electrode film to fill said plurality of through-holes, said second insulating film having a substantially flat surface;

removing a top portion of said bottom electrode film and said second insulating film, to thereby separate said bottom electrode film into a plurality of bottom electrodes;

removing said mask pattern to form a level difference between said first insulating film and a top of said plurality of bottom electrodes or said second insulating film;

depositing a third insulating film covering said first insulating film, said second insulating film and said plurality of bottom electrodes;

etching-back said third insulating film to leave a plurality of insulating spacers encircling the outer side of respective said bottom electrodes;

removing said first and second insulating films; and

depositing a capacitor insulation film and a top electrode film on said bottom electrodes and said plurality of insulating spacers to form a plurality of capacitors.

2. The method according to claim 1 , wherein said mask pattern includes polysilicon or amorphous carbon.

3. The method according to claim 1 , wherein a thickness of said mask pattern after the step of removing said mask pattern to form a level difference is larger than the gap between adjacent through-holes.

4. The method according to claim 1 , wherein said etching-back additionally leaves a bridge portion bridging two of said plurality of insulating spacers.

5. The method according to claim 1 , wherein said first insulating film includes an upper insulating film and a lower insulating film, said lower insulating film having a higher etch rate than said upper insulating film.

6. The method according to claim 1 , wherein said anisotropic-etching forms a dummy trench in said first insulating film, said dummy trench dividing an area of said first insulating film into a first area including therein said through-holes and a second area including therein no said through-holes, and said etching-back of said third insulating film is prevented on said second area.

7. The method according to claim 1 , wherein said plurality of through-holes have a shape of cylinder.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2014
From: ELPIDA MEMORY, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 032645/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2007
From: ETO, TOYONORI
To: ELPIDA MEMORY, INC.
Reel/Frame 019553/0930 →