Reconfigurable integrated circuits with scalable architecture including one or more adders
An integrated circuit (IC) includes a number of function blocks (FB), of which at least one is re-configurable. Each of the FBs may be a reconfigurable function or a non-reconfigurable function or recursively expanded with additional “nested” function blocks. The IC further includes a number of input pins, a number of output pins, an adder, and a number of crossbar devices. The elements, at least at the IC level, are coupled in a manner such that all input signals are provided to the FBs through a first subset of the crossbar devices, all internal signals are routed from one FB to another FB through a second subset of crossbar devices, and all output signals are routed from the FBs to the output pins through a third subset of crossbar devices. To increase routability and speed each of the crossbar device output has a single fanout. Additionally, each of the crossbar devices may provide only one input to each other crossbar device.
1. An apparatus comprising:
one or more function blocks, at least one of the function blocks being a reconfigurable function block comprising reconfigurable logic elements;
one or more adders reconfigurably coupled to the reconfigurable logic elements of the reconfigurable function block;
one or more first crossbar devices including one or more outputs coupled to a plurality of inputs of the one or more first adders; and
one or more second crossbar devices including one or more inputs coupled to a plurality of outputs of the one or more function blocks.
2. The apparatus of claim 1 , wherein the first one or more function blocks include at least a first function block comprising at least one recursively nested collection, each collection comprising one or more function blocks and one or more crossbar devices coupled to the one or more function blocks of the collection.
3. The apparatus of claim 2 , wherein one of the at least one recursively nested collections comprises:
m reconfigurable logic blocks, each logic block having n inputs and o outputs, m, n and o being integers, with a subset of m by o outputs provided as outputs of the collection;
an adder including 2m inputs and m outputs; and
n crossbar devices, each having m outputs correspondingly coupled to the n inputs of the m reconfigurable logic blocks, and outputs of the m reconfigurable logic blocks are maximally coupled to a first subset of inputs of the n crossbar devices and inputs of the collection coupled to a second subset of inputs of the n crossbar devices;
wherein the m outputs of a first of the n crossbar devices are also coupled to first m inputs of the adder, the m outputs of a second of the n crossbar devices are also coupled to second m inputs of the adder, and one of the n crossbar devices further having m inputs coupled to the m outputs of the adder; and
wherein integers m, n and o are greater then 0.
4. The apparatus of claim 3 , wherein each crossbar device output of the collection has at most two fanouts, one to a function block of the collection and one to an adder of the collection, and wherein each crossbar device of the collection provides only one input to another crossbar device of the collection.
5. The apparatus of claim 1 , wherein the one or more function blocks have n function blocks and the one or more adders of each function blocking having an adder having n outputs, and wherein n is an integer greater than 1.
6. The apparatus of claim 1 , further comprising a plurality of inputs and a plurality of outputs, wherein the plurality of inputs are coupled to some inputs of the first crossbar devices, and some outputs of the second crossbar devices are coupled to the plurality of outputs.
7. The apparatus of claim 6 , wherein the one or more function blocks comprise a plurality of function blocks, and the apparatus further comprises one or more third crossbar devices coupling one or more of the function blocks to one or more other function blocks.
8. The apparatus of claim 1 , wherein the at least one function block comprises:
one or more adders;
a plurality of reconfigurable logic elements;
one or more third crossbar devices coupling one or more of the reconfigurable logic elements to one or more others of the reconfigurable logic elements;
one or more fourth crossbar devices including one or more outputs coupled to inputs of the one or more adders; and
one or more fifth crossbar devices including one or more inputs coupled to outputs of the one or more adders.
9. The apparatus of claim 8 , wherein the at least one function block further comprises a plurality of inputs and one or more sixth crossbar devices coupling the inputs to some inputs of reconfigurable logic elements.
10. The apparatus of claim 1 , wherein the apparatus is an embedded logic block to be used to form an integrated circuit.
11. The apparatus of claim 1 , wherein the apparatus is an integrated circuit.
12. The apparatus of claim 1 , wherein each outputs of each of the first and second crossbar devices has at most two fanouts, and each of the first and second crossbar devices provides only one input to another of the first and second crossbar devices.
13. The apparatus of claim 8 , wherein the at least one function block further comprises a plurality of outputs, and one or more sixth crossbar devices coupling outputs of the reconfigurable logic elements to the outputs of the at least one function block.