IP Library Granted Patent US 7,910,908
Granted Patent B2
US 7,910,908 · App. 11/855,235 · Granted Mar 22, 2011

Phase change memory device in which a phase change layer is stably formed and prevented from lifting and method for manufacturing the same

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Quick Facts
Patent No.
US 7,910,908
App. No.
11/855,235
Granted
Mar 22, 2011
Kind
B2
Abstract

A phase change memory device includes a semiconductor substrate having a plurality of phase change cell regions; a lower electrode formed in each of the phase change cell regions on the semiconductor substrate; an insulation layer formed on the semiconductor substrate to cover the lower electrode and defined with a contact hole which exposes the lower electrode; a heater formed in the contact hole; a conductive pattern formed on the insulation layer to be spaced apart from the heater; a phase change layer formed on the heater, the conductive pattern, and portions of the insulation layer between the heater and the conductive pattern; and an upper electrode formed on the phase change layer. This phase change memory device allows the phase change layer to be stably formed and prevents the phase change layer from lifting.

Claims (21)

1. A phase change memory device comprising:

a semiconductor substrate having a plurality of phase change cell regions;

a plurality of lower electrodes formed on the semiconductor substrate in the phase change cell regions;

an insulation layer formed over the semiconductor substrate and covering the lower electrodes, the insulation layer having a plurality of contact holes exposing the lower electrodes;

a first heater and a second heater formed in the plurality of contact holes;

a conductive pattern formed at least on a left side region of the first heater, on a middle region between the first and second heaters, and on a right side region of the second heater so as to expose the first and second heaters, portions of the insulation layer between the first heater and the conductive pattern and portions of the insulation layer between the second heater and the conductive pattern;

a phase change layer pattern formed on the first and second heaters, the conductive pattern, and the portions of the insulation layer between the first heater and the conductive pattern and between the second heater and the conductive pattern; and

an upper electrode formed on the phase change layer pattern.

2. The phase change memory device according to claim 1 , wherein at least one of the first heater and the second heater is formed to completely fill the contact hole.

3. The phase change memory device according to claim 1 , wherein at least one of the first heater and the second heater does not completely fill the contact hole.

4. The phase change memory device according to claim 1 , wherein the phase change layer pattern and the upper electrode are formed in the shape of a pattern in each phase change cell region.

5. The phase change memory device according to claim 1 , wherein the phase change layer pattern and the upper electrode are formed in a manner such that the phase change layer pattern and the upper electrode extend between and connect phase change cell regions.

6. The phase change memory device according to claim 1 , wherein the conductive pattern is made of a same material as the first heater and the second heater.

7. A phase change memory device comprising:

a semiconductor substrate having a plurality of phase change cell regions;

a plurality of lower electrodes formed on the semiconductor substrate in the phase change cell regions;

an insulation layer formed over the semiconductor substrate and covering the lower electrodes, the insulation layer having a plurality of contact holes exposing the lower electrodes;

a plurality of heaters formed in the plurality of contact holes;

a conductive pattern formed on portions of the insulation layer on both sides of each heater of the plurality of heaters such that the conductive pattern is formed between adjacent heaters of the plurality of heaters and such that the plurality of heaters and portions of the insulation layer between each heater of the plurality of heaters and the conductive pattern are exposed;

a phase change layer pattern formed on each heater of the plurality of heaters, the conductive pattern on both sides of each heater of the plurality of heaters, and the portions of the insulation layer between each heater of the plurality of heaters and the conductive pattern; and

an upper electrode formed on the phase change layer pattern such that for a heater of the plurality of heaters, the phase change layer is interposed between the upper electrode and the conductive pattern on both sides of the heater and is interposed between the upper electrode and the heater between the conductive patterns on both sides of the heater.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE IS HYNIX SEMICONDUCTOR INC. NOT HYNIX-SEMICONDUCTOR INC. THERE IS NO HYPHEN IN THE NAME. PREVIOUSLY RECORDED ON REEL 67328 FRAME 814. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded May 14, 2024
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067412/0482 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067369/0832 →
CHANGE OF NAME Recorded May 6, 2024
From: HYNIX-SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 067328/0814 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2007
From: CHANG, HEON YONG
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 019826/0992 →