Semiconductor device having drain/source surrounded by impurity layer and manufacturing method thereof
View Patent ↗A transistor structure that improves ESD withstand voltages is offered. A high impurity concentration drain layer is formed in a surface of an intermediate impurity concentration drain layer at a location separated from a drain-side end of a gate electrode. And a P-type impurity layer is formed in a surface of a substrate between the gate electrode and the high impurity concentration drain layer so as to surround the high impurity concentration drain layer. When a parasitic bipolar transistor is turned on by an abnormal surge, electrons travel from a source electrode to a drain electrode. Here, electrons travel dispersed in the manner to avoid a vicinity X of the surface of the substrate and travel through a deeper path to the drain electrode as indicated by arrows in FIG. 4.
1. A semiconductor device comprising:
a gate insulation film disposed on and physically in contact with a semiconductor layer of a first general conductivity type;
a gate electrode disposed on the gate insulation film;
a source layer of a second general conductivity type formed in a first surface portion of the semiconductor layer;
a high impurity concentration drain layer of the second general conductivity type formed in a second surface portion of the semiconductor layer so as to be separated from a drain-side end of the gate electrode;
an impurity layer of the first general conductivity type formed in a third surface portion of the semiconductor layer between the gate electrode and the high impurity concentration drain layer; and
an intermediate impurity concentration drain layer formed in a fourth surface portion of the semiconductor layer so as to be disposed under the high impurity concentration drain layer and the impurity layer, the intermediate impurity concentration drain layer being lower in impurity concentration and deeper in depth than the high impurity concentration drain layer;
a drain electrode disposed on the high impurity concentration drain layer so as to be physically in contact with the high impurity concentration drain layer; and
a low impurity concentration drain layer of the second general conductivity type formed in a fifth surface portion of the semiconductor layer so as to be under the gate electrode and adjacent the impurity layer,
wherein the impurity layer is physically in contact with the intermediate impurity concentration drain layer,
the semiconductor layer is physically in contact with the intermediate impurity concentration drain layer,
the impurity layer is not physically in contact with the drain electrode,
the low impurity concentration drain layer is lower in impurity concentration and deeper in depth than the high impurity concentration drain layer and is lower in impurity concentration and shallower in depth than the intermediate impurity concentration drain layer, and
the impurity layer does not extend underneath the gate electrode.
2. The semiconductor device of claim 1 , further comprising a thick insulation film that is thicker than the gate insulation film and disposed on the semiconductor layer, wherein the gate electrode extends over a portion of the thick insulation film.
3. The semiconductor device of claim 2 , wherein the impurity layer is in contact with a drain-side end of the thick insulation film.
4. The semiconductor device of claim 1 , wherein the semiconductor layer is physically in contact with the source layer.
5. A method of manufacturing a semiconductor device, comprising:
forming a gate insulation film on a semiconductor layer of a first general conductivity type so as to be physically in contact with the semiconductor layer;
forming a gate electrode on the gate insulation film;
forming a high impurity concentration drain layer of a second general conductivity type in the semiconductor layer so as to be separated from the gate electrode;
forming an impurity layer of the first general conductivity type in the semiconductor layer between the gate electrode and the high impurity concentration drain layer so that the impurity layer does not extend underneath the gate electrode; and
forming an intermediate impurity concentration drain layer in the semiconductor layer so that the intermediate impurity concentration drain layer is physically in contact with the impurity layer and the semiconductor layer, is disposed under the high impurity concentration drain layer and the impurity layer, and is deeper in depth and lower in impurity concentration than the high impurity concentration drain layer;
forming a drain electrode on the high impurity concentration drain layer so as to be physically in contact with the high impurity concentration drain layer; and
forming a low impurity concentration drain layer in the semiconductor layer so that the low impurity concentration drain layer is positioned under the gate electrode and adjacent the impurity layer, is lower in impurity concentration and deeper in depth than the high impurity concentration drain layer, and is lower in impurity concentration and shallower in depth than the intermediate impurity concentration drain layer,
wherein the impurity layer is formed so as not to be physically in contact with the drain electrode.
6. The method of claim 5 , further comprising forming a thick insulation film on the low impurity concentration drain layer, the thick insulation film being thicker than the gate insulation film, wherein the forming of the impurity layer is performed so that the impurity layer is in contact with a drain-side end of the thick insulation film.
7. A semiconductor device comprising:
a semiconductor layer of a first general conductivity type;
a gate insulation film disposed on and physically in contact with the semiconductor layer;
a gate electrode disposed on the gate insulation film;
a source layer of a second general conductivity type formed in a surface portion of the semiconductor layer;
a drain layer of the second general conductivity type formed in a surface portion of the semiconductor layer;
a high impurity concentration drain layer of the second general conductivity type formed in a surface portion of the drain layer so as to be separated from a drain-side end of the gate electrode, the high impurity concentration drain layer having an impurity concentration higher than the drain layer;
an impurity layer of the first general conductivity type formed in a surface portion of the drain layer so as to surround the high impurity concentration drain layer in plan view of the semiconductor device;
a drain electrode physically in contact with the high impurity concentration drain layer; and
a source electrode in contact with the source layer,
wherein the high impurity concentration drain layer comprises an outer boundary in the plan view, and only the high impurity concentration drain layer exists within the outer boundary in the plan view,
the semiconductor layer is physically in contact with the drain layer,
the impurity layer is not physically in contact with the drain electrode,
the impurity layer does not extend underneath the gate electrode.
8. The semiconductor device of claim 7 , wherein the impurity layer surrounds and physically contacts the outer boundary in the plan view of the high impurity concentration drain layer.
9. A semiconductor device comprising:
a gate insulation film disposed on and physically in contact with a semiconductor layer of a first general conductivity type;
a gate electrode disposed on the gate insulation film;
a source layer of a second general conductivity type formed in a first surface portion of the semiconductor layer;
a high impurity concentration drain layer of the second general conductivity type formed in a second surface portion of the semiconductor layer so as to be separated from a drain-side end of the gate electrode;
an impurity layer of the first general conductivity type formed in a third surface portion of the semiconductor layer between the gate electrode and the high impurity concentration drain layer; and
an intermediate impurity concentration drain layer formed in a fourth surface portion of the semiconductor layer so as to be disposed under the high impurity concentration drain layer and the impurity layer, the intermediate impurity concentration drain layer being lower in impurity concentration and deeper in depth than the high impurity concentration drain layer;
a drain electrode disposed on the high impurity concentration drain layer so as to be physically in contact with the high impurity concentration drain layer; and
a thick insulation film that is thicker than the gate insulation film and disposed on the semiconductor layer,
wherein the gate electrode extends over a portion of the thick insulation film,
the impurity layer is physically in contact with the intermediate impurity concentration drain layer,
the semiconductor layer is physically in contact with the intermediate impurity concentration drain layer,
the impurity layer is not physically in contact with the drain electrode, and
the impurity layer does not extend underneath the thick insulation film.