Muting circuit
View Patent ↗A muting circuit comprising: a DC offset eliminating unit including an HPF (High Pass Filter) constituted by a first operational amplifier to eliminate a DC offset component of an AC input signal, the DC offset eliminating unit being configured to output an output signal obtained by eliminating the DC offset component of the AC input signal; a muting signal generating unit including a second operational amplifier configured to generate a second DC offset identical in level to a first DC offset at the first operational amplifier, the muting signal generating unit being configured to output a muting signal indicative of the second DC offset by fixing input to the second operational amplifier at a predetermined DC level; and a selecting unit configured to select and output the output signal when muting is not executed, and to select and output the muting signal when muting is executed.
1. A muting circuit comprising:
a DC offset eliminating unit including an HPF (High Pass Filter) constituted by a first operational amplifier, the DC offset eliminating unit configured to output an output signal obtained by eliminating a DC offset component of an AC input signal, the output signal having a first DC offset level introduced by the first operational amplifier;
a muting signal generating unit configured to generate a muting signal having a DC level identical to the first DC offset level, the muting signal generating unit including a second operational amplifier having inputs fixed at a predetermined DC level; and
a selecting unit configured to select and output the output signal when muting is not executed, and to select and output the muting signal when muting is executed.
2. The muting circuit of claim 1 , wherein
the first operational amplifier and the second operational amplifier are made from an identical wafer to have an identical performance.
3. The muting circuit of claim 1 , wherein
the DC offset eliminating unit further includes:
a first feedback resistance disposed on a negative-feedback path of the first operational amplifier;
a first input resistance and a second input resistance disposed respectively on an inverting input side and a non-inverting input side of the first operational amplifier, the AC input signal being input in common to an inverting input and a non-inverting input of the first operational amplifier through the first input resistance and the second input resistance, respectively; and
a first ground resistance and a DC cut capacitor disposed in parallel between the non-inverting input of the first operational amplifier and a ground,
so as to constitute the HPF, and wherein
the muting signal generating unit further includes:
a second feedback resistance identical to the first feedback resistance, disposed on a negative-feedback path of the second operational amplifier; and
a third input resistance and a fourth input resistance identical respectively to the first input resistance and the second input resistance, disposed respectively on an inverting input side and a non-inverting input side of the second operational amplifier,
the third input resistance and the fourth input resistance being connected to the ground in common through a second ground resistance identical to the first ground resistance.
4. The muting circuit of claim 1 , wherein the selecting unit further includes:
a first analogue switch configured to select and output an AC input signal output from the DC offset eliminating unit; and
a second analogue switch identical in characteristics to the first analogue switch, the second analogue switch being configured to select and output a muting signal output from the muting signal generating unit.